GS1501 PDF预览

GS1501

更新时间: 2025-07-27 04:19:51
品牌 Logo 应用领域
GENNUM 电视先进先出芯片
页数 文件大小 规格书
15页 185K
描述
HDTV Serial Digital Formatter with ANC FIFOs

GS1501 数据手册

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1.2 PIN DESCRIPTIONS  
PIN NUMBER  
NAME  
PCLK_IN  
GND  
TIMING  
Synchronous  
N/A  
TYPE  
Input  
DESCRIPTION  
1
Parallel data clock input. 74.25MHz or 74.25/1.001MHz.  
Ground. Ground power supply connections.  
2, 4, 14, 19, 24,  
37, 46, 50, 58,  
69, 79, 82, 91,  
94, 110, 116,  
128  
Ground  
3, 18, 20, 25, 38,  
47, 51, 59, 68,  
78, 81, 90, 93,  
99, 109, 115,  
127  
VDD  
N/A  
Power  
Input  
Power. Positive power supply connections.  
5
DET_TRS  
Non-  
synchronous  
Control Signal Input. Used to enable or disable the detection of  
the TRS signals embedded in the video stream. When DET  
_TRS is high, the device detects the TRS signals embedded in  
the input video stream and uses the detected HVF signals  
instead of the external HVF signals. When DET _TRS is low,  
TRS detection is disabled. The device uses the external  
supplied HVF signals.  
6
BLANK  
GND  
Synchronous  
wrt PCLK_IN  
Input  
Input  
Control Signal Input. When BLANK is low, the device sets the  
accompanying LUMA and CHROMA data to their appropriate  
blanking levels. When BLANK is high, the LUMA and CHROMA  
data streams pass through this stage of the device unaltered.  
See Figure 3.  
7, 17  
N/A  
This pin must be connected to GND for normal operation  
8
CODE_PROTECT  
Non-  
synchronous  
Control Signal Input. Used to enable or disable re-mapping of  
out-of-range words contained in the active portion of the video  
signal. When this signal is high, the device re-maps out-of-  
range words contained within the active portion of the video  
signal into CCIR-601 compliant words. Values between 000-003  
are re-mapped to 004. Values between 3FC and 3FF are re-  
mapped to 3FB. When this signal is low, out-of-range words in  
the active video region pass through the device unaltered.  
9
RSTLN  
BP_SC  
Synchronous  
wrt PCLK_IN  
Input  
Input  
Control Signal Input. Line number reset signal which must be  
asserted once per frame at the beginning of the frame (for  
example, on the falling edge of the F signal). A high to low  
transition will reset the line number counter of the device to one  
(1). See Figure 2 for timing.  
10  
Non-  
synchronous  
Control Signal Input. Used to enable or bypass the SMPTE292M  
scrambler and NRZ(I) encoder. When BP_SC is low, the video  
stream is scrambled according to SMPTE 292M and NRZ(I)  
encoded. When BP_SC is high, the scrambler and NRZ(I)  
encoder are by-passed.  
11  
12  
SRST  
Non-  
synchronous  
Input  
Input  
Control Signal Input. Used to reset the SMPTE292M scrambler  
and NRZI encoder. When SRST is low, the scrambler and  
encoder operate normally. A low to high transition on SRST  
causes the scrambler and encoder to reset.  
TRS_Y/C  
Non-  
synchronous  
Control Signal Input. Only used when DET_TRS is high. When  
TRS_Y/C is high, the device detects and uses TRS signals  
embedded in the LUMA (DATA_IN[19:10]) channel. When  
TRS_Y/C is low, the device detects and uses TRS signals  
embedded in the CHROMA (DATA_IN[9:0]) channel.  
4
GENNUM CORPORATION  
52234 - 4  

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