5秒后页面跳转
GM71VS17400CLJ-7 PDF预览

GM71VS17400CLJ-7

更新时间: 2022-01-20 00:16:00
品牌 Logo 应用领域
其他 - ETC 动态存储器
页数 文件大小 规格书
10页 106K
描述
x4 Fast Page Mode DRAM

GM71VS17400CLJ-7 数据手册

 浏览型号GM71VS17400CLJ-7的Datasheet PDF文件第1页浏览型号GM71VS17400CLJ-7的Datasheet PDF文件第2页浏览型号GM71VS17400CLJ-7的Datasheet PDF文件第4页浏览型号GM71VS17400CLJ-7的Datasheet PDF文件第5页浏览型号GM71VS17400CLJ-7的Datasheet PDF文件第6页浏览型号GM71VS17400CLJ-7的Datasheet PDF文件第7页 
GM71V17400C  
GM71VS17400CL  
DC Electrical Characteristics (VCC = 3.3V+/-0.3V, Vss = 0V, TA = 0 ~ 70C)  
Symbol  
Parameter  
Min Max Unit Note  
V
OH  
Output Level  
Output "H" Level Voltage (IOUT = -2mA)  
2.4  
0
V
CC  
V
V
Output Level  
Output "L" Level Voltage (IOUT = 2mA)  
V
OL  
0.4  
50ns  
60ns  
70ns  
-
-
100  
90  
Operating Current  
Average Power Supply Operating Current  
(RAS, CAS Cycling : tRC = tRC min)  
I
CC1  
mA  
mA  
mA  
1, 2  
-
80  
I
I
CC2  
CC3  
Standby Current (TTL)  
Power Supply Standby Current  
(RAS, CAS = VIH, DOUT = High-Z)  
-
2
50ns  
60ns  
70ns  
50ns  
60ns  
70ns  
-
-
100  
90  
RAS Only Refresh Current  
Average Power Supply Current  
RAS Only Refresh Mode  
(tRC = tRC min)  
2
-
-
-
80  
90  
80  
70  
I
CC4  
Fast Page Mode Current  
Average Power Supply Current  
Fast Page Mode  
mA  
1, 3  
(tPC = tPC min)  
-
-
-
Standby Current (CMOS)  
Power Supply Standby Current  
(RAS, CAS >= VCC - 0.2V, DOUT = High-Z)  
I
I
CC5  
CC6  
1
mA  
uA  
100  
4
50ns  
60ns  
70ns  
-
-
-
100  
90  
CAS-before-RAS Refresh Current  
(tRC = tRC min)  
mA  
80  
Battery Backup Operating Current(Standby with CBR Refresh)  
(CBR refresh, tRC=62.5us, tRAS<=0.3us,  
I
CC7  
-
-
300  
uA  
4
D
OUT=High-Z, CMOS interface)  
Standby Current RAS = VIH  
CAS = VIL  
I
I
CC8  
CC9  
5
mA  
1
4
D
OUT = Enable  
Self-Refresh Mode Current  
(RAS, CAS<=0.2V, DOUT=High-Z, CMOS interface)  
-
200  
10  
uA  
uA  
uA  
I
L(I)  
Input Leakage Current  
Any Input (0V<=VIN<= 4.6V)  
-10  
-10  
Output Leakage Current  
(DOUT is Disabled, 0V<=VOUT<= 4.6V)  
I
L(O)  
10  
Note: 1. ICC depends on output load condition when the device is selected.  
CC(max) is specified at the output open condition.  
2. Address can be changed once or less while RAS = VIL  
I
.
3. Address can be changed once or less while CAS = VIH  
.
4. L-version.  
Rev 0.1 / Apr’01  

与GM71VS17400CLJ-7相关器件

型号 品牌 描述 获取价格 数据表
GM71VS17400CLT-5 ETC x4 Fast Page Mode DRAM

获取价格

GM71VS17400CLT-6 ETC x4 Fast Page Mode DRAM

获取价格

GM71VS17400CLT-7 ETC x4 Fast Page Mode DRAM

获取价格

GM71VS17403BLJ-6 ETC x4 EDO Page Mode DRAM

获取价格

GM71VS17403BLJ-7 ETC x4 EDO Page Mode DRAM

获取价格

GM71VS17403BLJ-8 ETC x4 EDO Page Mode DRAM

获取价格