Datasheet > GM71C18160CJ-7

GM71C18160CJ-7

更新时间： 2022-01-18 23:30:00

品牌	Logo	应用领域
其他 - ETC		动态存储器
页数	文件大小	规格书
10页	112K
描述
x16 Fast Page Mode DRAM

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数据手册

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GM71C18160CJ-7 数据手册

GM71C18160C

GM71CS18160CL

DC Electrical Characteristics (VCC = 5V+/-10%, Vss = 0V, TA = 0 ~ 70C)

Symbol

Parameter

M in Max Unit Note

Output Level

Output "H" Level Voltage (IO U T = -5mA)

2.4

C C

Output Level

O L

0.4

Output "L" Level Voltage (IO U T = 4.2mA)

50ns

60ns

70ns

190

170

Operating Current

C C 1

Average Power Supply Operating Current

(RAS, UCAS or LCAS Cycling: tR C = tR C min)

1, 2

150

C C 2

S tandby Current (TTL)

Power Supply Standby Current

(RAS, UCAS, LCAS = VIH, D OUT = High-Z)

C C 3

RAS Only Refresh Current

50ns

60ns

70ns

50ns

60ns

190

170

Average Power Supply Current

RAS Only Refresh Mode

(tR C = tR C min)

150

185

165

C C 4

Fast Page Mode Current

Average Power Supply Current

Fast Page Mode

1, 3

(tPC = tPC min)

70ns

145

S tandby Current (CMOS)

C C 5

Power Supply Standby Current

150

(RAS, UCAS or LCAS >= VCC - 0.2V, DOUT = High-Z)

CAS-before-RAS Refresh Current

(tR C = tR C min)

C C 6

50ns

60ns

70ns

190

170

150

500

B attery B ack Up Operating Current

(Standby with CBR Refresh)

(tR C =125us, tR A S <=0.3us, DO U T =High-Z)

C C 7

4,5

S tandby Current RAS = VIH

UCAS, LCAS = VIL

C C 8

O U T = Enable

Self-Refresh Mode Current

C C 9

300

(RAS, UCAS or LCAS<=0.2V, DO U T =High-Z)

L(I)

Input Leakage Current

Any Input (0V<=V IN<= 6V)

-10

Output Leakage Current

L(O)

-10

(DOUT is Disabled, 0V<=V O U T <= 6V)

Note: 1. IC C depends on output load condition when the device is selected.

C C (max) is specified at the output open condition.

2. Address can be changed once or less while RAS = VI L

3. Address can be changed once or less while LCAS and UCAS = VIH

4. UCAS = L (<=0.2) and LCAS = L (<=0.2) while RAS = L (<=0.2).

5. L-version.

Rev 0.1 / Apr’01

1 2 345 6 7...10

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