256k 32k X 8 bit
FT28HC256
5 Volt, Byte Alterable EEPROM
FEATURES
DESCRIPTION
• Access time: 90ns
• Simple byte and page write
—Single 5V supply
The FT28HC256 is a second generation high perfor-
mance 32K x 8 EEPROM.
—No external high voltages or V control circuits
—Self-timed
—No erase before write
—No complex programming algorithms
—No overerase problem
• Low power CMOS
The FT28HC256 supports a 128-byte page write opera-
tion, effectively providing a 24µs/byte write cycle, and
enabling the entire memory to be typically rewritten in
less than 0.8 seconds. The FT28HC256 also features
DATA Polling and Toggle Bit Polling, two methods of
providing early end of write detection. The FT28HC256
also supports the JEDEC standard Software Data Pro-
tection feature for protecting against inadvertent writes
during power-up and power-down.
PP
—Active: 60mA
—Standby: 500µA
• Software data protection
—Protects data against system level inadvertent
writes
• High speed page write capability
• Highly reliable direct Write
—Endurance: 1,000,000 cycles
—Data retention: 100 years
• Early end of write detection
—DATA polling
Endurance for the FT28HC256 is specified as a mini-
mum 1,000,000 writecycles per byte and an inherent
data retention of 100 years.
—Toggle bit polling
BLOCK DIAGRAM
256Kbit
EEPROM
Array
X Buffers
Latches and
Decoder
A –A
0
14
Address
Inputs
I/O Buffers
and Latches
Y Buffers
Latches and
DECODER
I/O –I/O
0
7
Control
Logic and
Timing
Data Inputs/Outputs
CE
OE
WE
V
CC
SS
V
Characteristics subject to change without notice. 1 of 23
REV 1.0