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FM27C010VE120 PDF预览

FM27C010VE120

更新时间: 2024-02-29 16:35:35
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD OTP只读存储器内存集成电路
页数 文件大小 规格书
10页 379K
描述
OTP ROM, 128KX8, 120ns, CMOS, PQCC32, PLASTIC, LCC-32

FM27C010VE120 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Contact Manufacturer零件包装代码:QFJ
包装说明:QCCJ,针数:32
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.71风险等级:5.76
Is Samacsys:N最长访问时间:120 ns
JESD-30 代码:R-PQCC-J32JESD-609代码:e0
长度:13.995 mm内存密度:1048576 bit
内存集成电路类型:OTP ROM内存宽度:8
功能数量:1端子数量:32
字数:131072 words字数代码:128000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:128KX8
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装形状:RECTANGULAR封装形式:CHIP CARRIER
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:3.56 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:11.455 mm
Base Number Matches:1

FM27C010VE120 数据手册

 浏览型号FM27C010VE120的Datasheet PDF文件第2页浏览型号FM27C010VE120的Datasheet PDF文件第3页浏览型号FM27C010VE120的Datasheet PDF文件第4页浏览型号FM27C010VE120的Datasheet PDF文件第5页浏览型号FM27C010VE120的Datasheet PDF文件第6页浏览型号FM27C010VE120的Datasheet PDF文件第7页 
December 2000  
FM27C010  
1,048,576-Bit (128K x 8) High Performance  
CMOS EPROM  
The FM27C010 is one member of a high density EPROM Family  
which range in densities up to 4 Megabit.  
General Description  
The FM27C010 is a high performance, 1,048,576-bit Electrically  
Programmable UV Erasable Read Only Memory. It is organized  
as 128K-words of 8 bits each. Its pin-compatibility with byte-wide  
JEDEC EPROMs enables upgrades through 8 Mbit EPROMs.  
The “Don’t Care” feature during read operations allows memory  
expansions from 1M to 8M bits with no printed circuit board  
changes.  
Features  
I High performance CMOS  
90, 120, 150 ns access time  
I Fast turn-off for microprocessor compatibility  
I Simplified upgrade path  
VPP and PGM are “Don’t Care” during normal read  
operation  
TheFM27C010candirectlyreplacelowerdensity28-pinEPROMs  
by adding an A16 address line and VCC jumper. During the normal  
read operation PGM and VPP are in a “Don’t Care” state which  
allows higher order addresses, such as A17, A18, and A19 to be  
connected without affecting the normal read operation. This  
allows memory upgrades to 8M bits without hardware changes.  
The FM27C010 is also offered in a 32-pin plastic DIP with the  
same upgrade path.  
I Manufacturers identification code  
I Fast programming  
I JEDEC standard pin configurations  
32-pin PLCC package  
32-pin CERDIP package  
The FM27C010 provides microprocessor-based systems exten-  
sive storage capacity for large portions of operating system and  
application software. The FM27C010 offers a single chip solution  
forthecodestoragerequirementsof100%firmware-basedequip-  
ment. Frequently-used software routines are quickly executed  
from EPROM storage, greatly enhancing system utility.  
TheFM27C010ismanufacturedusingFairchild’sadvancedCMOS  
AMG™ EPROM technology.  
Block Diagram  
Data Outputs O - O  
0
7
V
CC  
GND  
V
PP  
OE  
CE  
Output Enable,  
Chip Enable, and  
Program Logic  
Output  
Buffers  
PGM  
Y Decoder  
1,048,576-Bit  
Cell Matrix  
A
- A  
16  
0
Address  
Inputs  
X Decoder  
DS800032-1  
© 2000 Fairchild Semiconductor Corporation  
FM27C010 Rev. A.1  
1
www.fairchildsemi.com  

FM27C010VE120 替代型号

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