Low Voltage 2.7V ≤ VCC ≤ 4.5V Specifications
Operating Conditions
Absolute Maximum Ratings (Note 5)
Ambient Storage Temperature
-65°C to +150°C
Ambient Operating Temperature
FM25C160UL/LZ
0°C to +70°C
-40°C to +85°C
-40°C to +125°C
All Input or Output Voltage with
Respect to Ground
FM25C160ULE/LZE
FM25C160ULV
+6.5V to -0.3V
+300°C
Lead Temp. (Soldering, 10 sec.)
ESD Rating
Power Supply (VCC
)
2.7V–4.5V
2000V
DC and AC Electrical Characteristics 2.7V ≤ VCC ≤ 4.5V (unless otherwise specified)
25C160UL/LE
25C160ULZ/ZE
25C160ULV
Symbol
Parameter
Part
Conditions
Min.
Max.
Min
Max
Units
ICC
Operating Current
/CS = VIL
3
3
mA
ICCSB
Standby Current
L
LZ
/CS = VCC
10
1
10
N/A
µA
µA
IIL
Input Leakage
VIN = 0 to VCC
-1
-1
1
1
-1
-1
1
1
µA
µA
V
IOL
Output Leakage
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
SCK Frequency
Input Rise Time
VOUT = GND to VCC
VIL
-0.3
VCC * 0.3
-0.3
VCC * 0.3
VIH
VOL
VOH
fOP
tRI
VCC * 0.7 VCC + 0.3
VCC * 0.7 VCC + 0.3
V
IOL = 0.8 mA
0.4
0.4
V
IOH = –0.8 mA
VCC - 0.8
VCC - 0.8
V
1.0
1.0
MHz
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
2.0
2.0
tFI
Input Fall Time
2.0
2.0
tCLH
tCLL
tCSH
tCSS
tDIS
tHDS
tCSN
tDIN
tHDN
tPD
Clock High Time
Clock Low Time
Min. /CS High Time
/CS Setup Time
Data Setup Time
/HOLD Setup Time
/CS Hold Time
(Note 6)
(Note 6)
(Note 7)
410
410
500
500
100
240
500
100
240
500
0
410
410
500
500
100
240
500
100
240
500
0
Data Hold Time
/HOLD Hold Time
Output Delay
CL = 200 pF
tDH
tLZ
Output Hold Time
/HOLD Output Low Z
Output Disable Time
/HOLD to Output Hi Z
Write Cycle Time
240
500
240
15
240
500
240
15
tDF
CL = 200 pF
1-16 Bytes
tHZ
tWP
Capacitance TA = 25°C, f = 2.1/1 MHz (Note 8)
AC Test Conditions
Output Load
CL = 200pF
Symbol
COUT
Test
Typ Max Units
Input Pulse Levels
0.1 * VCC - 0.9 * VCC
Output Capacitance
3
8
pF
Timing Measurement Reference Level 0.3 * VCC - 0.7 * VCC
CIN
Input Capacitance
2
6
pF
Note 5: Stress above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the device
at these or any other conditions above those indicated in the operational sections of the specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
Note 6: The fOP frequency specification specifies a minimum clock period of 1/fOP. Therefore, for every fOP clock cycle, tCLH + tCLL must be equal to or greater than 1/fOP. For
example, for a fOP of 1MHz, the period equals 1000ns. In this case if tCLH = is set to 410ns, then tCLL must be set to a minimum of 590ns.
Note 7: /CS must be brought high for a minimum of tCSH between consecutive instruction cycles.
Note 8: This parameter is periodically sampled and not 100% tested.
4
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FM25C160U Rev. B