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FM24164-C PDF预览

FM24164-C

更新时间： 2024-02-15 02:35:45
品牌 Logo 应用领域
铁电 - RAMTRON 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
8页 72K
描述
Non-Volatile SRAM, 2KX8, 3000ns, CMOS, PDIP8

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FM24164-C 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete包装说明：DIP, DIP8,.3
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.32.00.41风险等级：5.91
Is Samacsys：N最长访问时间：3000 ns
其他特性：FERROELECTRIC RAM; 2 WIRE I2C SERIAL INTERFACEJESD-30 代码：R-PDIP-T8
JESD-609代码：e0内存密度：16384 bit
内存集成电路类型：NON-VOLATILE SRAM内存宽度：8
功能数量：1端口数量：1
端子数量：8字数：2048 words
字数代码：2000工作模式：SYNCHRONOUS
最高工作温度：85 °C最低工作温度：-40 °C
组织：2KX8输出特性：OPEN-DRAIN
可输出：NO封装主体材料：PLASTIC/EPOXY
封装代码：DIP封装等效代码：DIP8,.3
封装形状：RECTANGULAR封装形式：IN-LINE
并行/串行：SERIAL峰值回流温度（摄氏度）：240
电源：5 V认证状态：Not Qualified
最大待机电流：0.00006 A子类别：SRAMs
最大压摆率：0.0003 mA最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：NO技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
Base Number Matches：1

FM24164-C 数据手册

 浏览型号FM24164-C的Datasheet PDF文件第1页浏览型号FM24164-C的Datasheet PDF文件第2页浏览型号FM24164-C的Datasheet PDF文件第4页浏览型号FM24164-C的Datasheet PDF文件第5页浏览型号FM24164-C的Datasheet PDF文件第6页浏览型号FM24164-C的Datasheet PDF文件第7页 
Pin Descriptions  
Bus Protocol  
SCL — Serial Clock  
The FM24164 employs a bi-directional two wire bus protocol  
requiring a minimum of processor I/O pins. Figure 1 shows a  
typical system configuration connecting a microcontroller with  
eight FM24164 devices.  
When high, the SCL clocks data into and out of the FM24164. It  
is an input only. This input is built with a Schmitt trigger to provide  
increased noise immunity.  
By convention, any device sending data onto the bus is the  
transmitter, while the device that is getting the data is the receiver.  
The device controlling the bus is the master and provides the clock  
signal for all operations. Devices being controlled are the slaves.  
The FM24164 is always a slave device.  
Transitions or states on the SDA and SCL lines denote one of  
four conditions: a start, stop, data bit, or acknowledge. Figure 2  
shows the signaling for these conditions, while the following four  
sections describe their function.  
SDA — Serial Data Address  
This bi-directional pin is used to transfer addresses to the  
FM24164 and data to or from the FM24164. It is an open drain  
output and intended to be wire-ORed with all other devices on the  
serial bus using an external pull-up resistor. The input circuitry on  
this pin is built with a Schmitt trigger to reduce noise sensitivity.  
The output section incorporates slope control for the falling edges.  
Figure 3 shows the detailed timing specifications for the bus.  
Note that all SCL specifications and the start and stop specifications  
apply to both read and write operations. They are shown on one or  
the other for clarity. Also, the write timing specifications apply to all  
transmissions to the FM24164, including the slave and word  
address, as well as write data sent to the FM24164 from the bus  
master.  
WP — Write Protect  
If tied to V , write operations into the upper half of the  
memory (pageCsCelect A set to 1 in the slave address) will be  
disabled. Read and writ2e operations to the lower portion of  
memory will proceed normally. If the write protection feature is not  
desired, this pin must be tied to V .  
SS  
Figure 1. Typical System Configuration  
RMIN = 1.8K  
R
R
RMAX = tR / CBUS  
SCL  
Bus  
Master  
SDA  
SDA  
FM24164  
S2 S1 S0  
SCL  
SDA  
FM24164  
S2 S1 S0  
SCL  
SDA  
FM24164  
S2 S1 S0  
SCL  
SDA  
FM24164  
S2 S1 S0  
SCL  
(Up to 8 Total)  
V
CC  
V
SS  
{
Slave Address  
Device Select  
S2, S1, S0  
0
0
0
0
0
1
0
1
0
1
1
1
(Bit Nos. 6, 5, 4)  
Figure 2. Data Transfer Protocol  
SCL  
SDA  
7
6
0
Data Bit  
(Transmitter)  
Data Bit  
(Transmitter)  
Data Bit  
(Transmitter)  
Acknowledge  
(Receiver)  
Stop  
(Master)  
Start  
(Master)  
3
12345678

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