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FM24C02UFLEN PDF预览

FM24C02UFLEN

更新时间: 2024-02-10 05:33:28
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
14页 107K
描述
I2C Serial EEPROM

FM24C02UFLEN 技术参数

是否Rohs认证: 符合生命周期:Contact Manufacturer
包装说明:, WAFERReach Compliance Code:unknown
风险等级:5.81数据保留时间-最小值:100
耐久性:1000000 Write/Erase CyclesI2C控制字节:1010DDDR
内存密度:2048 bit内存集成电路类型:EEPROM
内存宽度:8字数:256 words
字数代码:256最高工作温度:85 °C
最低工作温度:-40 °C组织:256X8
封装等效代码:WAFER并行/串行:SERIAL
电源:2.5/5 V认证状态:Not Qualified
串行总线类型:I2C最大待机电流:0.000001 A
子类别:EEPROMs最大压摆率:0.003 mA
技术:CMOS温度等级:INDUSTRIAL
写保护:HARDWAREBase Number Matches:1

FM24C02UFLEN 数据手册

 浏览型号FM24C02UFLEN的Datasheet PDF文件第2页浏览型号FM24C02UFLEN的Datasheet PDF文件第3页浏览型号FM24C02UFLEN的Datasheet PDF文件第4页浏览型号FM24C02UFLEN的Datasheet PDF文件第5页浏览型号FM24C02UFLEN的Datasheet PDF文件第6页浏览型号FM24C02UFLEN的Datasheet PDF文件第7页 
August 2000  
FM24C02U/03U – 2K-Bit Standard 2-Wire Bus  
Interface Serial EEPROM  
General Description  
Features  
The FM24C02U/03U devices are 2048 bits of CMOS non-volatile  
electrically erasable memory. These devices conform to all speci-  
fications in the Standard IIC 2-wire protocol. They are designed to  
minimize device pin count and simplify PC board layout require-  
ments.  
I Extended operating voltage 2.7V – 5.5V  
I 400 KHz clock frequency (F) at 2.7V - 5.5V  
I 200µA active current typical  
10µA standby current typical  
1µA standby current typical (L)  
0.1µA standby current typical (LZ)  
The upper half (upper 1Kbit) of the memory of the FM24C03U can  
be write protected by connecting the WP pin to VCC. This section of  
I IIC compatible interface  
memory then becomes unalterable unless WP is switched to VSS  
.
– Provides bi-directional data transfer protocol  
This communications protocol uses CLOCK (SCL) and DATA  
I/O (SDA) lines to synchronously clock data between the master  
(forexampleamicroprocessor)andtheslaveEEPROMdevice(s).  
The Standard IIC protocol allows for a maximum of 16K of  
EEPROM memory which is supported by the Fairchild family in  
2K, 4K, 8K, and 16K devices, allowing the user to configure the  
memory as the application requires with any combination of  
EEPROMs. In order to implement higher EEPROM memory  
densities on the IIC bus, the Extended IIC protocol must be used.  
(RefertotheFM24C32orFM24C65datasheetsformoreinforma-  
tion.)  
I Sixteen byte page write mode  
– Minimizes total write time per byte  
I Self timed write cycle  
Typical write cycle time of 6ms  
I Hardware Write Protect for upper half (FM24C03U only)  
I Endurance: 1,000,000 data changes  
I Data retention greater than 40 years  
I Packages available: 8-pin DIP, 8-pin SO, and 8-pin TSSOP  
I Available in three temperature ranges  
- Commercial: 0° to +70°C  
Fairchild EEPROMs are designed and tested for applications requir-  
ing high endurance, high reliability and low power consumption.  
- Extended (E): -40° to +85C  
- Automotive (V): -40° to +125°C  
Block Diagram  
V
CC  
V
SS  
WP  
H.V. GENERATION  
TIMING &CONTROL  
START  
STOP  
SDA  
LOGIC  
CONTROL  
LOGIC  
SLAVE ADDRESS  
REGISTER &  
2
E
PROM  
COMPARATOR  
XDEC  
ARRAY  
SCL  
A2  
A1  
A0  
WORD  
ADDRESS  
COUNTER  
R/W  
YDEC  
CK  
D
OUT  
DATA REGISTER  
D
IN  
1
© 2000 Fairchild Semiconductor International  
FM24C02U/03U Rev. A.3  
www.fairchildsemi.com  

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