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FM1233T PDF预览

FM1233T

更新时间: 2024-11-21 20:16:27
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
6页 44K
描述
Power Management Circuit, Fixed, +3.08VV, CMOS

FM1233T 技术参数

生命周期:Obsolete包装说明:, TO-236
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.84
可调阈值:NO端子数量:3
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装等效代码:TO-236
电源:1/5.5 V认证状态:Not Qualified
子类别:Power Management Circuits最大供电电流 (Isup):0.05 mA
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL阈值电压标称:+3.08V
Base Number Matches:1

FM1233T 数据手册

 浏览型号FM1233T的Datasheet PDF文件第2页浏览型号FM1233T的Datasheet PDF文件第3页浏览型号FM1233T的Datasheet PDF文件第4页浏览型号FM1233T的Datasheet PDF文件第5页浏览型号FM1233T的Datasheet PDF文件第6页 
August 2000  
FM1233  
Precision Reset Generator Circuit  
General Description  
Features  
The FM1233 features comprehensive reset generation for  
microcontroller/microprocessorbasedsystems. IfthesystemVCC  
voltage level is determined to be in an out-of-tolerance state, the  
device automatically generates a low-going reset signal. The  
reset signal is held in the active state (low) for a specified duration  
(minimum 140 ms) after the VCC returns to an in-tolerance state.  
I Automaticresetgenerationonpower-up  
I Minimum 140 ms reset pulse — compatible with other similar  
1233 class devices  
I Other reset pulse choices available: 32 - 256 ms  
I Choice of commercial and extended temperature ranges  
I Choice of Reset Thresholds: 4.63V, 4.38V, 4.00V, 3.08V,  
2.93V, 2.63V  
The FM1233 also allows an external reset to be connected to the  
reset pin without adding aditional debounce logic or extra pins.  
I Package available: SOT-23  
This device is fabricated using CMOS technology. This device is  
available in the SOT-23 package.  
Block Diagram  
VCC  
Reset_out  
(active low)  
VCC Tolerance Detect  
& Reset Monitor  
Output  
Stage  
External Reset  
Detection  
Temp. Compensated  
Reference  
Connection Diagram  
1
1 = GND  
2 = RESET'  
3 = VCC  
FM1233  
3
2
1
© 2000 Fairchild Semiconductor International  
FM1233 Rev. A  
www.fairchildsemi.com  

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