Datasheet > FIN324CMLX

FIN324CMLX

更新时间： 2024-10-01 03:36:55

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		/
页数	文件大小	规格书
23页	569K
描述
24-Bit Ultra-Low Power Serializer Deserializer Supporting Single and Dual Displays

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FIN324CMLX 数据手册

March 2007

FIN324C

24-Bit Ultra-Low Power Serializer Deserializer

Supporting Single and Dual Displays

Features

Description

The FIN324C is a 24-bit serializer / deserializer with dual

strobe inputs. The device can be configured as a master

or slave device through the master/slave select pin

(M/S). This allows for the same device to be used as

either a serializer or deserializer, minimizing component

types in the system. The dual strobe inputs allow

implementation of dual-display systems with a single

pair of µSerDes. The FIN324C can accommodate RGB,

microcontroller, or SPI mode interfaces. Read and write

transactions are supported when operating with a

Motorola-style microcontroller interface for one or both

displays. Unlike other SerDes solutions, no external

timing reference is required for operation.

Ultra-Low Operating Power: ~4mA at 5.44MHz

Supports Dual-Display Implementations with RGB

or Microcontroller Interface

No External Timing Reference Needed

SPI Mode Support

Single Device Operates as a Serializer or

Deserializer

Direct Support for Motorola^®-Style R/W

Microcontroller Interface

Direct Support for Intel^®-Style /WE, /RE

Microcontroller Interface

The FIN324C is designed for ultra-low power operation.

Reset (/RES) and standby (/STBY) signals put the

device in an ultra-low power state. In standby mode, the

outputs of the slave device maintain state, allowing the

system to resume operation from the last-known state.

15MHz Maximum Strobe Frequency

Utilizes Fairchild’s Proprietary CTL Serial I/O

Technology

Available in BGA and MLP packages

The device utilizes Fairchild’s proprietary ultra-low power,

low-EMI Current Transfer Logic™ (CTL) technology. The

serial interface disables between transactions to minimize

EMI at the fundamental serial interface and to conserve

power. LV-CMOS parallel output buffers have been

implemented with slew rate control to adjust for capacitive

loading and to minimize EMI.

Wide Parallel Supply Voltage Range: 1.60 to 3.0V

Low Power Core Operation: V_DDS/A=2.5 to 3.0V

Voltage Translation Capability Across Pair with No

External Components

High ESD protection: >14.5kV HBM

Power-Saving Burst-Mode Operation

The serialization bit clock is generated internally to the

FIN324C. The minimum bit clock frequency is always

great enough to handle the maximum strobe frequency.

Applications

Related Application Notes

Single or Dual 16/18-Bit RGB Cell Phone Displays

Single or Dual 16/18-Bit Cell Phone Displays with

Microcontroller Interface

AN-5058 µSerDes™ Family Frequently Asked

Questions

AN-5061 µSerDes™ Layout Guidelines

AN-6047 FIN324C Reset and Standby

Single or Dual Mobile Display at QVGA or HVGA

Resolution

FIN324C Rev. 1.0.5

www.fairchildsemi.com

12 3 4 5 6 7...23

中文翻译

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与FIN324CMLX相关器件

型号	品牌	获取价格	描述	数据表
FIN3363MTDX	FAIRCHILD	获取价格	Line Driver, 3 Func, 3 Driver, PDSO48, 6.10 MM, MO-153, TSSOP-48
FIN3364MTD	FAIRCHILD	获取价格	Line Receiver, 3 Func, 3 Rcvr, PDSO48, 6.10 MM, MO-153, TSSOP-48
FIN3364MTDX	FAIRCHILD	获取价格	Line Receiver, 3 Func, 3 Rcvr, PDSO48, 6.10 MM, MO-153, TSSOP-48
FIN3365MTD	FAIRCHILD	获取价格	Line Driver, 3 Func, 3 Driver, PDSO48, 6.10 MM, MO-153, TSSOP-48
FIN3366MTDX	FAIRCHILD	获取价格	Line Receiver, 3 Func, 3 Rcvr, PDSO48, 6.10 MM, MO-153, TSSOP-48
FIN3383	FAIRCHILD	获取价格	Low Voltage 28-Bit Flat Panel Display Link Serializers
FIN3383MTD	FAIRCHILD	获取价格	Low Voltage 28-Bit Flat Panel Display Link Serializers
FIN3384	FAIRCHILD	获取价格	Low Voltage 28-Bit Flat Panel Display Link Serializers/Deserializers
FIN3384MTD	FAIRCHILD	获取价格	Low Voltage 28-Bit Flat Panel Display Link Serializers/Deserializers
FIN3384MTDX	FAIRCHILD	获取价格	Line Receiver, 4 Func, 4 Rcvr, PDSO56, 6.10 MM, ROHS COMPLIANT, MO-153EE, TSSOP-56

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