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FAN3227CMPX PDF预览

FAN3227CMPX

更新时间: 2022-10-12 15:10:06
品牌 Logo 应用领域
安森美 - ONSEMI
页数 文件大小 规格书
26页 1767K
描述
Dual 2-A High-Speed, Low-Side Gate Drivers

FAN3227CMPX 数据手册

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Electrical Characteristics (Continued)  
Unless otherw ise noted, VDD=12 V, TJ=-40°C to +125°C. Currents are defined as positive into the device and  
negative out of the device.  
Symbol  
Parameter  
Conditions  
Min. Typ. Max. Unit  
ENABLE (FAN3226C, FAN3226T, FAN3227C, FAN3227T) (continued)  
tD3 0 V to 5 V EN, 1 V/ns Slew Rate  
tD4 5 V to 0 V EN, 1 V/ns Slew Rate  
10  
10  
19  
18  
34  
32  
ns  
ns  
EN to Output Propagation Delay(12)  
FAN3226CMX, FAN3226TMX, FAN3227CMX, FAN3227TMX_F085 (Automotive-Qualified Versions)  
tD3  
tD4  
0 V to 5 V EN, 1 V/ns Slew Rate  
5 V to 0 V EN, 1 V/ns Slew Rate  
8
8
19  
18  
35  
35  
ns  
ns  
EN to Output Propagation Delay(12),(14)  
Outputs  
OUT at VDD/2,  
CLOAD=0.1 µF, f=1 kHz  
ISINK  
OUT Current, Mid-Voltage, Sinking(11)  
2.4  
A
A
OUT Current, Mid-Voltage,  
Sourcing(11)  
OUT at VDD/2,  
CLOAD=0.1 µF, f=1 kHz  
ISOURCE  
-1.6  
IPK_SINK  
OUT Current, Peak, Sinking(11)  
OUT Current, Peak, Sourcing(11)  
Output Rise Time(13)  
Output Fall Time(13)  
Output Reverse Current Withstand(11)  
CLOAD=0.1 µF, f=1 kHz  
CLOAD=0.1 µF, f=1 kHz  
CLOAD=1000 pF  
3
-3  
A
A
IPK_SOURCE  
tRISE  
tFALL  
IRVS  
12  
9
22  
17  
ns  
ns  
mA  
CLOAD=1000 pF  
500  
FAN322xT, FAN322xC  
tD1  
CMOS Input  
CMOS Input  
TTL Input  
7
6
15  
15  
19  
18  
30  
29  
34  
32  
Output Propagation Delay, CMOS  
ns  
Inputs(13)  
tD2  
tD1  
tD2  
10  
10  
Output Propagation Delay, TTL  
Inputs(13)  
ns  
ns  
TTL Input  
Propagation Matching Betw een  
Channels(14)  
INA=INB, OUTA and OUTB at  
50% Point  
tDEL.MATCH  
1
2
FAN322xTMX_F085, FAN322xCMX_F085 (Automotive-Qualified Versions)  
CMOS Input  
CMOS Input  
TTL Input  
tD1  
tD2  
tD1  
tD2  
7
6
9
9
15  
15  
19  
18  
33  
42  
34  
32  
Output Propagation Delay, CMOS  
Inputs(13),(14)  
ns  
Output Propagation Delay, TTL  
Inputs(13),(14)  
ns  
ns  
TTL Input  
Propagation Matching Betw een  
Channels(14)  
INA=INB, OUTA and OUTB at  
50% Point  
tDEL.MATCH  
VOH  
2
4
High Level Output Voltage(14)  
Low Level Output Voltage(14)  
VOH =VDDVOUT, IOUT=1 mA  
15  
10  
35  
25  
mV  
mV  
VOL  
IOUT = 1 mA  
Notes:  
9. Low er supply current due to inactive TTL circuitry.  
10. EN inputs have TTL thresholds; refer to the ENABLE section.  
11. Not tested in production.  
12. See Timing Diagrams of Figure 11 and Figure 12.  
13. See Timing Diagrams of Figure 9 and Figure 10.  
14. Apply to only F085 Version  
www.onsemi.com  
9
 
 
 
 
 
 

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