Datasheet > FAN3223TMX_12

FAN3223TMX_12

更新时间： 2022-06-06 10:43:06

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		驱动器栅极栅极驱动
页数	文件大小	规格书
24页	1729K
描述
Dual 4A High-Speed, Low-Side Gate Drivers

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数据手册

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FAN3223TMX_12 数据手册

Electrical Characteristics (Continued)

Unless otherwise noted, V_DD=12V, T_J=-40°C to +125°C. Currents are defined as positive into the device and negative

out of the device.

Symbol

Output

Parameter

Conditions

Min. Typ. Max. Unit

OUT at V_DD/2,

C_LOAD=0.22µF, f=1kHz

I_SINK

OUT Current, Mid-Voltage, Sinking⁽¹⁰⁾

4.3

OUT at V_DD/2,

C_LOAD=0.22µF, f=1kHz

I_SOURCE

I_{PK_SINK}

OUT Current, Mid-Voltage, Sourcing⁽¹⁰⁾

OUT Current, Peak, Sinking⁽¹⁰⁾

-2.8

C_LOAD=0.22µF, f=1kHz

I_{PK_SOURCE}OUT Current, Peak, Sourcing⁽¹⁰⁾

-5

V_OH

High Level Output Voltage

V^OH= VDD – VOUT, IOUT = –1mA

V_OL

t_RISE

t_FALL

Low Level Output Voltage

Output Rise Time⁽¹¹⁾

Output Fall Time⁽¹¹⁾

IOUT = 1mA

C_LOAD=2200pF

Output Propagation Delay, CMOS

Inputs⁽¹²⁾

t_D1, t_D2

0 - 12V_IN, 1V/ns Slew Rate

Output Propagation Delay, TTL Inputs⁽¹²⁾0 - 5V_IN, 1V/ns Slew Rate

INA=INB, OUTA and OUTB

at 50% point

T_DEL.MATCHPropagation Matching Between Channels

I_RVS

Output Reverse Current Withstand⁽¹⁰⁾

500

Notes:

8. Lower supply current due to inactive TTL circuitry.

9. EN inputs have TTL thresholds; refer to the ENABLE section

10. Not tested in production.

11. See Timing Diagrams of Figure 9 and Figure 10.

12. See Timing Diagrams of Figure 7 and Figure 8.

www.fairchildsemi.com

FAN3223 / FAN3224 / FAN3225_F085 • Rev. 1.0.0

1...5 6 789 10 11...24

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