Datasheet > F81485

F81485

更新时间： 2022-11-02 18:08:37

品牌	Logo	应用领域
精拓 - FINTEK		/
页数	文件大小	规格书
12页	150K
描述
5V Low Power RS-485 Interface Transceiver

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F81485 数据手册

F81485

General Description

The F81485 is a CMOS design, features with single 5 V power supply, and low power differential

bus/line transceiver suitable for the multipoint data transmission EIA standard RS485 and RS422

applications. The extended common-mode range is −7 V to +12 V. Both the driver and the receiver

can be enabled independently. The driver and receiver feature three-state outputs, with the driver

outputs maintaining high impedance over the entire common-mode range. Excessive power

dissipation caused by the bus contention or faults is prevented by a thermal shutdown circuit which

forces the driver outputs into a high impedance state. The receiver contains a fail-safe feature that

results in a logic high output state if the inputs are unconnected (floating). Up to 32 transceivers can

be connected simultaneously on a bus, but only one driver should be enabled at any time. The

F81485 features extremely fast switching speeds. Minimal driver propagation delays permit

transmission at data rates up to 5 Mbps while low skew minimizes EMI interference. All inputs and

outputs contain protection against ESD; all driver outputs feature high source and sink current

capability. An epitaxial layer is used to guard against latch-up.

Feature List

z Single 5V Supply

z Meets EIA RS-485 standard

z High speed, low power BiCMOS

z -7V to 12V Bus Common-Mode Range Permits

z ±7V Ground Difference Between Devices on the Bus

z ESD ±8KV Contact

z Thermal Shutdown Protection

z Driver Maintains High Impedance in Three-State or with the Power Off

z 70mV Typical Input Hysteresis

z Driver propagation delay: 10 ns typical

z Receiver propagation delay: 15 ns typical

z High-Z outputs with power off

z Pin Compatible with the ADM485, SP485

z 8 Pin SOP Packaging

Jan, 2012

V0.11P

1 2 345 6 7...12

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