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F740SL PDF预览

F740SL

更新时间: 2024-11-28 01:23:23
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描述
2.5V HCSL Oscillator

F740SL 数据手册

 浏览型号F740SL的Datasheet PDF文件第2页 
2.5V HCSL Oscillator  
RoHS Compliant / REACH Compliant  
Rev. 2/11/2013  
Model: F740SL SERIES  
Page 1 of 2  
http://www.foxonline.com/need_a_sample.htm  
FEATURES  
• HCL Differential Output  
• Low Phase Jitter (under 1pS RMS 12kHz~20MHz)  
• Tape and Reel (2,000 pcs. STD)  
• PART NUMBER SELECTION  
Model  
Number  
F740SL  
Frequency  
Operating  
Frequency  
T O P  
Part Number  
Stability1 Temperature (ºC) Range (MHz)  
M a rk ing  
5.1 Max  
844-Frequency-xxxxx  
±100PPM  
0 ~ +70  
-40 ~ +85  
0 ~ +70  
-40 ~ +85  
0 ~ +70  
15.000 ~ 160.000  
15.000 ~ 160.000  
15.000 ~ 160.000  
15.000 ~ 160.000  
15.000 ~ 160.000  
15.000 ~ 160.000  
844A-Frequency-xxxxx F740SLR ±100PPM  
844B-Frequency-xxxxx F745SL  
844C-Frequency-xxxxx F74SLR  
844D-Frequency-xxxxx F746SL  
±50PPM  
±50PPM  
±25PPM  
7.1 Max  
844E-Frequency-xxxxx F746SLR ±25PPM  
-40 ~ +85  
1.40  
• ELECTRICAL CHARACTERISTICS  
MAX (unless otherwise noted)  
PARAMETERS  
Frequency Range (Fo)  
Storage Temperature Range (Tstg)  
1.4  
15.000 ~ 160.000 MHz  
-55ºC ~ +125ºC  
2.5V ± 5%  
40mA  
45% ~ 55%  
Supply Voltage  
Input Current  
(Vdd)  
(Idd)  
#1  
#6  
#2  
#3  
Output Symmetry (Cross Point)  
Rise/Fall Time (0.175 ~ 0.525V)  
15.000 ~ 99.999999 MHz  
2.46  
1.0nS  
#5  
#4  
1.27  
100.000 ~ 160.000 MHz  
0.7nS  
Output Voltage  
(Vol)  
(Voh)  
(Vopp)  
5.08  
-0.15 ~ 0.15V  
0.58 ~ 0.85V  
0.6V Min  
50 Ohms to GND  
10µA  
10mS  
200nS  
10mS  
Output Swing  
Output Load  
R e c om m e nde d  
S olde r P a d L a y out  
Standby Current  
Start-up Time  
5.08  
(Ts)  
Output Disable Time 2  
Output Enable Time 2  
#6  
#5  
#4  
Aging (per year @ 25ºC)  
Phase Jitter (12kHz ~ 20MHz)  
Maximum Soldering Temp / Time  
Moisture Sensitivity Level (MSL)  
Termination Finish  
±3 PPM  
1pS RMS  
260ºC / 10 Seconds  
1
T O P V ie w  
4.2  
#1  
#2  
#3  
2
Au  
1 Inclusive of 25ºC tolerance, operating temperature range.  
1.8  
1.6  
2 An internal pullup resistor from pin 1 to pin 6 allows active output if pin 1 is left open.  
Note: A 0.01µF capacitor should be placed between Vdd (Pin 6) and GND (Pin3) to minimize  
power supply noise.  
P in C onne c tions  
Drawing is for reference to critical specifications defined by size measurements.  
Certain non-critical visual attributes, such as side castellations, reference pin shape, etc. may  
vary. All specifications subject to change without notice.  
#1 E/D  
#2 N.C.  
#3 GND  
#4 Output_1  
#5 Output_2  
#6 VDD  
All dimensions are in millimeters.  
• ENABLE / DISABLE FUNCTION  
OUTPUT (Pin 4, Pin 5)  
ACTIVE  
(Pin 1)  
OPEN2  
ACTIVE  
High Z  
'1' Level Vih 70% Vdd  
'0' Level Vil 30% Vdd  
FOXElectronics 5570 Enterprise Parkway Fort Myers, Florida 33905 USA +1.239.693.0099 FAX +1.239.693.1554 www.foxonline.com  
EMEA Tel: +44 .1283.568153 | Canada +1.888.438.2369 | Asia Hong Kong Tel: +852.2854.4285 | Japan Tel: +81.3.3374.2079  
© 2013 FOX ELECTRONICS | An Integrated Device Technology, Inc. company | ISO9001:2008 Certified  

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