Datasheet > EVAL-ADCMP607BCPZ

EVAL-ADCMP607BCPZ

更新时间： 2024-11-24 22:36:11

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
14页	365K
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BOARD EVAL FOR ADCMP607 12LFCSP

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Rail-to-Rail, Very Fast, 2.5 V to 5.5 V,

Single-Supply CML Comparators

Data Sheet

ADCMP606/ADCMP607

FEATURES

GENERAL DESCRIPTION

Fully specified rail to rail at V_CCI= 2.5 V to 5.5 V

Input common-mode voltage from −0.2 V to V_CCI+ 0.2 V

CML-compatible output stage

1.25 ns propagation delay

50 mW at 2.5 V power supply

The ADCMP606 and ADCMP607 are very fast comparators

fabricated on XFCB2, an Analog Devices, Inc., proprietary

process. These comparators are exceptionally versatile and easy

to use. Features include an input range from V_EE− 0.5 V to

V_CCI+ 0.2 V, low noise, CML-compatible output drivers, and

Shutdown pin

TTL-/CMOS-compatible latch inputs with adjustable hysteresis

and/or shutdown inputs.

Single-pin control for programmable hysteresis and latch

(ADCMP607 only)

Power supply rejection > 60 dB

−40°C to +125°C operation

The devices offer 1.25 ns propagation delay with 2.5 ps rms

random jitter (RJ). Overdrive and slew rate dispersion are

typically less than 50 ps.

APPLICATIONS

A flexible power supply scheme allows the devices to operate

with a single +2.5 V positive supply and a −0.5 V to +2.7 V

input signal range up to a +5.5 V positive supply with a −0.5 V

to +5.7 V input signal range. The ADCMP607 features split

input/output supplies with no sequencing restrictions to

support a wide input signal range with independent output

swing control and power savings.

High speed instrumentation

Clock and data signal restoration

Logic level shifting or translation

Pulse spectroscopy

High speed line receivers

Threshold detection

Peak and zero-crossing detectors

High speed trigger circuitry

Pulse-width modulators

Current-/voltage-controlled oscillators

Automatic test equipment (ATE)

The CML-compatible output stage is fully back-matched for

superior performance. The comparator input stage offers robust

protection against large input overdrive, and the outputs do not

phase reverse when the valid input signal range is exceeded. On

the ADCMP607, latch and programmable hysteresis features are

also provided with a unique single-pin control option.

The ADCMP606 is available in a 6-lead SC70 package and the

ADCMP607 is available in a 12-lead LFCSP package.

FUNCTIONAL BLOCK DIAGRAM

CCO

(ADCMP607 ONLY)

CCI

NONINVERTING

INPUT

Q OUTPUT

CML

ADCMP606/

ADCMP607

INVERTING

INPUT

LE/HYS INPUT (ADCMP607 ONLY)

INPUT (ADCMP607 ONLY)

Figure 1.

Rev. C

Document Feedback

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rightsof third parties that may result fromits use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks andregisteredtrademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Technical Support

www.analog.com

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