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ESD7554MUT2G PDF预览

ESD7554MUT2G

更新时间: 2024-09-29 01:22:43
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
7页 230K
描述
4Channel DualVoltage Protection Array

ESD7554MUT2G 数据手册

 浏览型号ESD7554MUT2G的Datasheet PDF文件第2页浏览型号ESD7554MUT2G的Datasheet PDF文件第3页浏览型号ESD7554MUT2G的Datasheet PDF文件第4页浏览型号ESD7554MUT2G的Datasheet PDF文件第5页浏览型号ESD7554MUT2G的Datasheet PDF文件第6页浏览型号ESD7554MUT2G的Datasheet PDF文件第7页 
ESD7554  
4­Channel Low Capacitance  
Dual­Voltage ESD  
Protection Array  
Features  
http://onsemi.com  
MARKING  
3 Channels of Low Voltage ESD Protection  
1 Channel of High Voltage ESD Protection  
Provides ESD Protection to IEC6100042 Level 4:  
DIAGRAM  
8 kV Contact Discharge (Pins 13)  
8
15 kV Contact Discharge (Pin 4)  
30V MG  
G
Low Channel Input Capacitance  
1
1
Minimal Capacitance Change with Temperature and Voltage  
High Voltage Zener Diode Protects Supply Rail  
No Need for External Bypass Capacitors  
WDFN8  
CASE 517BC  
Each I/O Pin Can Withstand Over 1000 ESD Strikes*  
30V = Specific Device Code  
M
G
= Date Code  
= PbFree Package  
These Devices are PbFree, Halogen Free/BFR Free and are RoHS  
Compliant  
PINOUT  
5
4
6
7
8
1
DAP  
3
2
Bottom View  
(Pins up View)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
NOTE: Note: Pins 5, and 6 to 8 are connected to a common  
substrate.  
Figure 1. Electrical Schematic  
*Standard test condition is IEC6100042 level 4 test circuit with each pin subjected to 8 kV contact discharge for 1000 pulses. Discharges  
are timed at 1 second intervals and all 1000 strikes are completed in one continuous test run. The part is then subjected to standard production  
test to verify that all of the tested parameters are within spec after the 1000 strikes.  
© Semiconductor Components Industries, LLC, 2010  
1
Publication Order Number:  
November, 2010 Rev. 0  
ESD7554/D  

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