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EPM240GT100I5N PDF预览

EPM240GT100I5N

更新时间: 2024-01-11 07:38:21
品牌 Logo 应用领域
阿尔特拉 - ALTERA LTE输入元件可编程逻辑
页数 文件大小 规格书
2页 94K
描述
Flash PLD, 7.5ns, 192-Cell, CMOS, PQFP100, 16 X 16 MM, 0.50 MM PITCH, LEAD FREE, TQFP-100

EPM240GT100I5N 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:TFQFP, TQFP100,.63SQReach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:1.19其他特性:IT CAN ALSO OPERATE AT 3.3V
系统内可编程:YESJESD-30 代码:S-PQFP-G100
JESD-609代码:e3JTAG BST:YES
长度:14 mm湿度敏感等级:3
专用输入次数:I/O 线路数量:80
宏单元数:192端子数量:100
组织:0 DEDICATED INPUTS, 80 I/O输出函数:MACROCELL
封装主体材料:PLASTIC/EPOXY封装代码:TFQFP
封装等效代码:TQFP100,.63SQ封装形状:SQUARE
封装形式:FLATPACK, THIN PROFILE, FINE PITCH峰值回流温度(摄氏度):260
电源:1.5/3.3,1.8 V可编程逻辑类型:FLASH PLD
传播延迟:7.5 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Programmable Logic Devices
最大供电电压:1.89 V最小供电电压:1.71 V
标称供电电压:1.8 V表面贴装:YES
技术:CMOS端子面层:MATTE TIN (472) OVER COPPER
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:40
宽度:14 mmBase Number Matches:1

EPM240GT100I5N 数据手册

 浏览型号EPM240GT100I5N的Datasheet PDF文件第2页 
6. Reference and Ordering Information  
MII51006-1.6  
Software  
®
®
®
MAX II devices are supported by the Altera Quartus II design software with new,  
®
optional MAX+PLUS II look and feel, which provides HDL and schematic design  
entry, compilation and logic synthesis, full simulation and advanced timing analysis,  
and device programming. Refer to the Design Software Selector Guide for more  
details about the Quartus II software features.  
The Quartus II software supports the Windows XP/2000/NT, Sun Solaris, Linux Red  
Hat v8.0, and HP-UX operating systems. It also supports seamless integration with  
industry-leading EDA tools through the NativeLink interface.  
Device Pin-Outs  
Printed device pin-outs for MAX II devices are available on the Altera website  
(www.altera.com).  
Ordering Information  
Figure 6–1 describes the ordering codes for MAX II devices. For more information  
about a specific package, refer to the Package Information chapter in the MAX II Device  
Handbook.  
Figure 6–1. MAX II Device Packaging Ordering Information  
EPM  
240  
G
T
100  
C
3
ES  
Family Signature  
EPM: MAX II  
Optional Suffix  
Indicates specific device  
options or shipment method  
ES: Engineering sample  
N: Lead-free packaging  
Device Type  
240:  
240 Logic Elements  
570 Logic Elements  
1,270 Logic Elements  
2,210 Logic Elements  
Speed Grade  
570:  
1270:  
2210:  
3, 4, 5, 6, 7, or 8, with 3 being the fastest  
Product-Line Suffix  
Indicates device type  
Operating Temperature  
C: Commercial temperature (TJ = 0° C to 85° C)  
I: Industrial temperature (TJ = -40° C to 100° C)  
A: Automotive temperature (TJ = -40° C to 125° C)  
G:  
Z:  
1.8-V VCCINT low-power device  
1.8-V VCCINT zero-power device  
2.5-V or 3.3-V VCCINT device  
Blank (no identifier):  
Package Type  
Thin quad flat pack (TQFP)  
FineLine BGA  
T:  
F:  
M: Micro FineLine BGA  
Pin Count  
Number of pins for a particular package  
© August 2009 Altera Corporation  
MAX II Device Handbook  
 

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