FLEX 10KE Embedded Programmable Logic Family Data Sheet
Notes to tables:
(1) All pins that are not listed are user I/O pins.
(2) All FineLine BGA packages support SameFrame pin migration to allow migration from one package to another. The
MAX+PLUS II software performs this function automatically when future migration is set.
(3) This pin is a dedicated pin and is not available as a user I/O pin.
(4) This pin can be used as a user I/O pin if it is not used for its device-wide or configuration function.
(5) This pin can be used as a user I/O pin after configuration.
(6) This pin is tri-stated in user mode.
(7) This pin drives the ClockLock and ClockBoost circuitry.
(8) This pin shows the status of the ClockLock and ClockBoost circuitry. When the ClockLock and ClockBoost circuitry
is locked to the incoming clock and generates an internal clock, LOCKis driven high. LOCKremains high if a periodic
clock stops clocking. The LOCKfunction is optional; if the LOCKoutput is not used, this pin is a user I/O pin.
(9) This pin is the power or ground for the ClockLock and ClockBoost circuitry. To ensure noise resistance, the power
and ground supply to the ClockLock and ClockBoost circuitry should be isolated from the power and ground to the
rest of the device. If the ClockLock or ClockBoost circuitry is not used, this power or ground pin should be
connected to VCCINTor GND,respectively.
(10) When using the EPF10K100B device, connect this pin to VCCINT.
(11) When using the EPF10K100B device, connect this pin to GNDINT.
(12) The user I/O pin count includes dedicated input pins, dedicated clock pins, and all I/O pins.
Table 90 shows pin compatibility between different FLEX 10KE devices.
Table 90. FLEX 10KE Device Pin Compatibility Note (1)
Device
144-Pin 208-Pin 240-Pin 599-Pin 356-Pin 600-Pin 256-Pin 484-Pin 672-Pin
TQFP
PQFP
PQFP
RQFP
PGA
BGA
BGA
FineLine FineLine FineLine
BGA
BGA
BGA
EPF10K30E
EPF10K50E
EPF10K50S
EPF10K100B
EPF10K100E
EPF10K130E
EPF10K200E
EPF10K200S
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(4)
(4)
(4)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(3)
(4)
(3)
(3)
(3)
(3)
(3)
(3)
(2)
(2)
(3)
(3)
(3)
Notes:
(1) All FineLine BGA packages support SameFrame pin migration to allow migration from one package to another. The
MAX+PLUS II software automatically avoids conflicting pins when future migration is set.
(2) Devices in the same package are pin-compatible and have the same number of I/O pins.
(3) Devices in the same package are pin-compatible, although some devices have more I/O pins than others. When
planning device migration, use the I/O pins that are common to all devices. The MAX+PLUS II software
versions 9.1 and higher provide features to help use only the common pins.
(4) This option will be supported with a 484-pin FineLine BGA package. By using SameFrame pin migration, all
FineLine BGA packages are pin-compatible. For example, a board can be designed to support 256-pin, 484-pin, and
672-pin FineLine BGA packages. The MAX+PLUS II software automatically avoids conflicting pins when future
migration is set.
Altera Corporation
115
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