Datasheet > EP2AGZ350FH29I4N

EP2AGZ350FH29I4N

更新时间： 2023-02-26 16:13:22

品牌	Logo	应用领域
英特尔 - INTEL		栅可编程逻辑
页数	文件大小	规格书
16页	396K
描述
Field Programmable Gate Array, 348500-Cell, CMOS, PBGA780,

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EP2AGZ350FH29I4N 技术参数

是否Rohs认证：	符合	生命周期：	End Of Life
包装说明：	BGA, BGA780,28X28,40	Reach Compliance Code：	compliant
风险等级：	5.56	JESD-30 代码：	S-PBGA-B780
输入次数：	281	逻辑单元数量：	348500
输出次数：	281	端子数量：	780
封装主体材料：	PLASTIC/EPOXY	封装代码：	BGA
封装等效代码：	BGA780,28X28,40	封装形状：	SQUARE
封装形式：	GRID ARRAY	电源：	0.9,1.2/3.3,1.5,2.5 V
可编程逻辑类型：	FIELD PROGRAMMABLE GATE ARRAY	认证状态：	Not Qualified
子类别：	Field Programmable Gate Arrays	表面贴装：	YES
技术：	CMOS	端子形式：	BALL
端子节距：	1 mm	端子位置：	BOTTOM

EP2AGZ350FH29I4N 数据手册

1. Overview for the Arria II Device Family

December 2011

AIIGX51001-4.3

The Arria^®II device family is designed specifically for ease-of-use. The

cost-optimized, 40-nm device family architecture features a low-power,

programmable logic engine and streamlined transceivers and I/Os. Common

interfaces, such as the Physical Interface for PCI Express^®(PCIe^®), Ethernet, and

DDR3 memory are easily implemented in your design with the Quartus^®II software,

the SOPC Builder design software, and a broad library of hard and soft intellectual

property (IP) solutions from Altera. The Arria II device family makes designing for

applications requiring transceivers operating at up to 6.375 Gbps fast and easy.

This chapter contains the following sections:

■

“Arria II Device Feature” on page 1–1

“Arria II Device Architecture” on page 1–6

“Reference and Ordering Information” on page 1–14

Arria II Device Feature

The Arria II device features consist of the following highlights:

■

40-nm, low-power FPGA engine

■

Adaptive logic module (ALM) offers the highest logic efficiency in the industry

Eight-input fracturable look-up table (LUT)

Memory logic array blocks (MLABs) for efficient implementation of small

FIFOs

■

High-performance digital signal processing (DSP) blocks up to 550 MHz

■

Configurable as 9 x 9-bit, 12 x 12-bit, 18 x 18-bit, and 36 x 36-bit full-precision

multipliers as well as 18 x 36-bit high-precision multiplier

■

Hardcoded adders, subtractors, accumulators, and summation functions

Fully-integrated design flow with the MATLAB and DSP Builder software

from Altera

■

Maximum system bandwidth

■

Up to 24 full-duplex clock data recovery (CDR)-based transceivers supporting

rates between 600 Mbps and 6.375 Gbps

■

Dedicated circuitry to support physical layer functionality for popular serial

protocols, including PCIe Gen1 and PCIe Gen2, Gbps Ethernet, Serial

RapidIO^®(SRIO), Common Public Radio Interface (CPRI), OBSAI,

SD/HD/3G/ASI Serial Digital Interface (SDI), XAUI and Reduced XAUI

(RXAUI), HiGig/HiGig+, SATA/Serial Attached SCSI (SAS), GPON,

SerialLite II, Fiber Channel, SONET/SDH, Interlaken, Serial Data Converter

(JESD204), and SFI-5.

and/or trademarks of Altera Corporation in the U.S. and other countries. All other trademarks and service marks are the property of their respective holders as described at

www.altera.com/common/legal.html. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera’s standard warranty, but

reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any

information, product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device

specifications before relying on any published information and before placing orders for products or services.

Arria II Device Handbook Volume 1: Device Interfaces and Integration

December 2011

12 3 4 5 6 7...16

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与EP2AGZ350FH29I4N相关器件

型号	品牌	获取价格	描述	数据表
EP2AGZ350HF40C3N	INTEL	获取价格	Field Programmable Gate Array, 500MHz, 348500-Cell, CMOS, PBGA1517, LEAD FREE, MS-034, FBG
EP2AGZ350HF40C4	INTEL	获取价格	Field Programmable Gate Array,
EP2AGZ350HF40I3N	INTEL	获取价格	Field Programmable Gate Array, 500MHz, 348500-Cell, CMOS, PBGA1517, LEAD FREE, MS-034, FBG
EP2AGZ350HF40I4N	INTEL	获取价格	Field Programmable Gate Array, 500MHz, 348500-Cell, CMOS, PBGA1517, LEAD FREE, MS-034, FBG
EP2-B3G1	NEC	获取价格	Twin relay for motor and solenoid reversible control
EP2-B3G1S	NEC	获取价格	Twin relay for motor and solenoid reversible control
EP2-B3G1ST	NEC	获取价格	Twin relay for motor and solenoid reversible control
EP2-B3G1T	NEC	获取价格	Twin relay for motor and solenoid reversible control
EP2-B3G2	NEC	获取价格	Twin relay for motor and solenoid reversible control
EP2-B3G2S	NEC	获取价格	Twin relay for motor and solenoid reversible control

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