是否Rohs认证: | 符合 | 生命周期: | Obsolete |
包装说明: | BGA, BGA484,22X22,40 | Reach Compliance Code: | compliant |
风险等级: | 5.8 | JESD-30 代码: | S-PBGA-B484 |
JESD-609代码: | e1 | 湿度敏感等级: | 3 |
输入次数: | 376 | 逻辑单元数量: | 8320 |
输出次数: | 376 | 端子数量: | 484 |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | BGA |
封装等效代码: | BGA484,22X22,40 | 封装形状: | SQUARE |
封装形式: | GRID ARRAY | 电源: | 2.5,2.5/3.3 V |
可编程逻辑类型: | FIELD PROGRAMMABLE GATE ARRAY | 认证状态: | Not Qualified |
子类别: | Field Programmable Gate Arrays | 表面贴装: | YES |
技术: | CMOS | 端子面层: | Tin/Silver/Copper (Sn/Ag/Cu) |
端子形式: | BALL | 端子节距: | 1 mm |
端子位置: | BOTTOM | Base Number Matches: | 1 |
型号 | 品牌 | 描述 | 获取价格 | 数据表 |
EP20K200FC484-2XV | ALTERA | Loadable PLD, 3ns, CMOS, PBGA484, FINE LINE, BGA-484 |
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EP20K200FC484-3 | ALTERA | Loadable PLD, 3.6ns, CMOS, PBGA484, FINE LINE, BGA-484 |
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EP20K200FC484-3ES | ETC | FPGA |
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EP20K200FC672-1 | INTEL | Loadable PLD, PBGA672, 27 X 27 MM, 1 MM PITCH, FINE LINE, BGA-672 |
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EP20K200FC672-2 | INTEL | Loadable PLD, PBGA672, 27 X 27 MM, 1 MM PITCH, FINE LINE, BGA-672 |
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EP20K200FC672-3 | INTEL | Loadable PLD, PBGA672, 27 X 27 MM, 1 MM PITCH, FINE LINE, BGA-672 |
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