Datasheet > EM636165TS-7I/7IG

EM636165TS-7I/7IG

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
钰创 - ETRON		动态存储器
页数	文件大小	规格书
73页	756K
描述
1Mega x 16 Synchronous DRAM (SDRAM)

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EM636165TS-7I/7IG 数据手册

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EtronTech

EM636165-XXI

LDQM and UDQM are byte specific, nonpersistent

1M x 16 SDRAM

LDQM,

Input

Data Input/Output Mask:

I/O buffer controls. The I/O buffers are placed in a high-z state when

LDQM/UDQM is sampled HIGH. Input data is masked when LDQM/UDQM is

sampled HIGH during a write cycle. Output data is masked (two-clock latency)

when LDQM/UDQM is sampled HIGH during a read cycle. UDQM masks DQ15-

DQ8, and LDQM masks DQ7-DQ0.

UDQM

DQ0-DQ15 Input/Output

Data I/O:

The DQ0-15 input and output data are synchronized with the positive

edges of CLK. The I/Os are byte-maskable during Reads and Writes.

No Connect:

These pins should be left unconnected.

V_DDQ

Supply

DQ Power:

Provide isolated power to DQs for improved noise immunity.

( 3.3V 0.3V )

V_SSQ

Supply

DQ Ground:

Provide isolated ground to DQs for improved noise immunity.

( 0 V )

V_DD

V_SS

Supply

Power Supply:

Ground

+3.3V 0.3V

Preliminary

Rev. 1.1 Apr. 2005

1 2 345 6 7...73

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