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EH2925ETTS-22.1148M PDF预览

EH2925ETTS-22.1148M

更新时间： 2024-12-02 07:05:19
品牌 Logo 应用领域
日蚀 - ECLIPTEK 石英晶振
页数 文件大小 规格书
10页 775K
描述
CMOS, Quartz Crystal Clock Oscillators XO (SPXO) LVCMOS (CMOS) 1.8Vdc 4 Pad 5.0mm x 7.0mm Ceramic Surface Mount (SMD) Quartz Crystal Clock Oscillators XO (SPXO) LVCMOS (CMOS) 1.8Vdc 4 Pad 5.0mm x 7.0mm Ceramic Surface Mount (SMD)

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EH2925ETTS-22.1148M 数据手册

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Ecliptek | EH29 Series Oscillator  
http://www.ecliptek.com/oscillators/EH29/  
Log On | 714-433-1200 | Email Customer Support  
Home  
Products  
Quick Quote  
My Parts List  
Site Map  
Contact Us  
EH29 Series Oscillator  
Quartz Crystal Clock Oscillators XO (SPXO) LVCMOS (CMOS) 1.8Vdc 4 Pad 5.0mm x 7.0mm Ceramic Surface Mount (SMD)  
2011/65 +  
168 SVHC  
2015/863  
Revision E 06/08/2012  
ectrical Specifications  
Nominal Frequency  
1.000MHz to 200.000MHz  
Some frequencies within this range may not be available.  
requency Tolerance/Stability  
(Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency  
Stability over the Operating Temperature Range, Supply Voltage  
Change, Output Load Change, First Year Aging at 25°C, 260°C Reflow,  
Shock, and Vibration)  
±100ppm Maximum  
±50ppm Maximum  
±25ppm Maximum  
±20ppm Maximum  
ging at 25°C  
±5ppm/year Maximum  
Operating Temperature Range  
0°C to +70°C  
-40°C to +85°C  
upply Voltage  
nput Current  
1.8V  
±5%  
DC  
No Load  
3.5mA Maximum over Nominal Frequency of 1MHz to 25MHz  
4mA Maximum over Nominal Frequency of 25.000001MHz to 75MHz  
5mA Maximum over Nominal Frequency of 75.000001MHz to 100MHz  
8mA Maximum over Nominal Frequency of 100.000001MHz to 200MHz  
Output Voltage Logic High (V  
)
OH  
I
= -8mA  
OH  
90% of V  
Minimum  
Maximum  
DD  
Output Voltage Logic Low (V  
uty Cycle  
)
I
= +8mA  
OL  
OL  
10% of V  
DD  
Measured at 50% of Waveform  
50 ±10(%)  
50 ±5(%)  
ise Time/Fall Time  
Measured at 20% to 80% of Waveform  
6nSec Maximum from 1MHz to 50MHz  
4nSec Maximum from 50.000001MHz to 75MHz  
2nSec Maximum from 75.000001MHz to 200MHz  
oad Drive Capability  
Output Logic Type  
in 1 Connection  
15pF Maximum  
CMOS  
Tri-State (High Impedance)  
ri-State Input Voltage (Vih and Vil)  
90% of V  
10% of V  
Minimum or No Connect to Enable Output  
Maximum to Disable Output (High Impedance)  
DD  
DD  
tandby Current  
MS Phase Jitter  
10µA Maximum (Pin 1 = Ground)  
Fj=12kHz to 20MHz  
20pSec Typical, 30pSec Maximum  
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28-Jan-2016 1:03 PM  
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