Datasheet > EFM32GG230F512G-E-QFN64

EFM32GG230F512G-E-QFN64

更新时间： 2024-01-11 04:09:48

品牌	Logo	应用领域
芯科 - SILICON		微控制器
页数	文件大小	规格书
72页	1626K
描述
RISC Microcontroller, CMOS

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技术参数
数据手册

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EFM32GG230F512G-E-QFN64 技术参数

是否Rohs认证：	符合	生命周期：	Active
Reach Compliance Code：	compliant	HTS代码：	8542.31.00.01
风险等级：	1.7	Samacsys Description：	ARM Microcontrollers - MCU 512k Flash, 128k RAM, AES
Base Number Matches：	1

EFM32GG230F512G-E-QFN64 数据手册

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...the world's most energy friendly microcontrollers

and key registers. All write accesses to the AES module must be 32-bit operations, i.e. 8- or 16-bit

operations are not supported.

2.1.27 General Purpose Input/Output (GPIO)

In the EFM32GG230, there are 56 General Purpose Input/Output (GPIO) pins, which are divided into

ports with up to 16 pins each. These pins can individually be configured as either an output or input. More

advanced configurations like open-drain, filtering and drive strength can also be configured individually

for the pins. The GPIO pins can also be overridden by peripheral pin connections, like Timer PWM

outputs or USART communication, which can be routed to several locations on the device. The GPIO

supports up to 16 asynchronous external pin interrupts, which enables interrupts from any pin on the

device. Also, the input value of a pin can be routed through the Peripheral Reflex System to other

peripherals.

2.2 Configuration Summary

The features of the EFM32GG230 is a subset of the feature set described in the EFM32GG Reference

Manual. Table 2.1 (p. 7) describes device specific implementation of the features.

Table 2.1. Configuration Summary

Module

Cortex-M3

DBG

Configuration

Pin Connections

Full configuration

DBG_SWCLK, DBG_SWDIO,

DBG_SWO

MSC

Full configuration

Full configuration with IrDA

Full configuration with I2S

Full configuration

Full configuration with DTI

Full configuration

DMA

RMU

EMU

CMU

CMU_OUT0, CMU_OUT1

WDOG

PRS

I2C0

I2C0_SDA, I2C0_SCL

I2C1_SDA, I2C1_SCL

US0_TX, US0_RX. US0_CLK, US0_CS

US1_TX, US1_RX, US1_CLK, US1_CS

US2_TX, US2_RX, US2_CLK, US2_CS

LEU0_TX, LEU0_RX

LEU1_TX, LEU1_RX

TIM0_CC[2:0], TIM0_CDTI[2:0]

TIM1_CC[2:0]

I2C1

USART0

USART1

USART2

LEUART0

LEUART1

TIMER0

TIMER1

TIMER2

TIMER3

RTC

TIM2_CC[2:0]

TIM3_CC[2:0]

BURTC

LETIMER0

LET0_O[1:0]

www.silabs.com

2016-03-21 - EFM32GG230FXX - d0035_Rev1.40

1...4 5 678 9 10...72

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