Datasheet > EDS6416AJTA-6B-E

EDS6416AJTA-6B-E

更新时间： 2024-01-30 16:42:58

品牌	Logo	应用领域
尔必达 - ELPIDA		动态存储器
页数	文件大小	规格书
49页	622K
描述
64M bits SDRAM

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数据手册

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EDS6416AJTA-6B-E 数据手册

DATA SHEET

64M bits SDRAM

EDS6416AJTA (4M words × 16 bits)

Specifications

Pin Configurations

• Density: 64M bits

• Organization

/xxx indicates active low signal.

54-pin Plastic TSOP (II)

⎯ 1M words × 16 bits × 4 banks

• Package: 54-pin plastic TSOP (II)

⎯ Lead-free (RoHS compliant)

• Power supply: VDD, VDDQ = 3.3V ± 0.3V

• Clock frequency: 166MHz/133MHz (max.)

• Four internal banks for concurrent operation

• Interface: LVTTL

• Burst lengths (BL): 1, 2, 4, 8, full page

• Burst type (BT):

⎯ Sequential (1, 2, 4, 8, full page)

⎯ Interleave (1, 2, 4, 8)

VDD

DQ0

VDDQ

DQ1

DQ2

VSSQ

DQ3

DQ4

VDDQ

DQ5

DQ6

VSSQ

DQ7

VDD

LDQM

/WE

/CAS

/RAS

/CS

BA0

BA1

A10

VDD

VSS

DQ15

VSSQ

DQ14

DQ13

VDDQ

DQ12

DQ11

VSSQ

DQ10

DQ9

VDDQ

DQ8

VSS

UDQM

CLK

CKE

A11

• /CAS Latency (CL): 2, 3

• Precharge: auto precharge option for each burst

access

• Refresh: auto-refresh, self-refresh

• Refresh cycles: 4096 cycles/64ms

⎯ Average refresh period: 15.6μs

• Operating ambient temperature range

⎯ TA = 0°C to +70°C

VSS

Features

(Top view)

• Single pulsed /RAS

• Burst read/write operation and burst read/single write

operation capability

A0 to A11

Address input

• Byte control by UDQM and LDQM

BA0, BA1

DQ0 to DQ15

/CS

Bank select address

Data-input/output

Chip select

/RAS

/CAS

/WE

Row address strobe

Column address strobe

Write enable

LDQM, UDQM

CKE

Input/output mask

Clock enable

CLK

Clock input

VDD

VSS

VDDQ

VSSQ

Power for internal circuit

Ground for internal circuit

Power for DQ circuit

Ground for DQ circuit

No connection

Document No. E0884E30 (Ver.3.0)

This product became EOL in March, 2007.

Date Published June 2006 (K) Japan

Printed in Japan

URL: http://www.elpida.com

12 3 4 5 6 7...49

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