Datasheet > EDI88128LPXNM

EDI88128LPXNM

更新时间： 2024-02-01 22:49:37

品牌	Logo	应用领域
WEDC		静态存储器
页数	文件大小	规格书
8页	387K
描述
128Kx8 MONOLITHIC SRAM, SMD 5962-89598

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EDI88128LPXNM 数据手册

EDI88128C

White Electronic Designs

128Kx8 MONOLITHIC SRAM, SMD 5962-89598

The EDI88128C is a high speed, high performance,

Monolithic CMOS Static RAM organized as 128Kx8.

FEATURES

ꢀ

Access Times of 70, 85, 100ns

The device is also available as EDI88130C with an

additional chip select line (CS2) which will automatically

power down the device when proper logic levels are

applied.

ꢀ

Available with Single Chip Selects (EDI88128) or

Dual Chip Selects (EDI88130)

ꢀ

2V Data Retention (LP Versions)

CS# and OE# Functions for Bus Control

TTL Compatible Inputs and Outputs

Fully Static, No Clocks

The second chip select line (CS2) can be used to provide

system memory security during power down in non-battery

backed up systems and simpliﬁy decoding schemes in

memory banking where large multiple pages of memory

are required.

Organized as 128Kx8

Industrial, Military and Commercial Temperature

Ranges

The EDI88128C and the EDI88130C have eight bi-

directional input-output lines to provide simultaneous

access to all bits in a word. An automatic power down

feature permits the on-chip circuitry to enter a very low

standby mode and be brought back into operation at a

speed equal to the address access time.

ꢀ

Thru-hole and Surface Mount Packages JEDEC

Pinout

• 32 pin Ceramic DIP, 0.6 mils wide (Package 9)

• 32 lead Ceramic SOJ (Package 140)

Single +5V ( 10ꢀ) Supply Operation

Low power versions, EDI88128LP and EDI88130LP, offer

a 2V data retention function for battery back-up opperation.

Military product is available compliant to Appendix A of

MIL-PRF-38535.

ꢀ

FIGURE 1 – PIN CONFIGURATION

PIN DESCRIPTION

I/O0-7

A0-16

WE#

Data Inputs/Outputs

Address Inputs

Write Enable

32 DIP

32 SOJ

CS1#, CS2

OE#

V_CC

V_SS

Chip Selects

Top View

Output Enable

Power (+5V 10ꢀ%

Ground

A16

A14

A12

32 VCC

31 A15

30 NC/CS2*

29 WE#

28 A13

27 A8

Not Connected

26 A9

BLOCK DIAGRAM

25 A11

24 OE#

23 A10

22 CS1#

21 I/O7

20 I/O6

19 I/O5

18 I/O4

17 I/O3

A2 10

A1 11

AØ 12

I/OØ 13

I/O1 14

I/O2 15

VSS 16

WE#

CS1#

CS2

OE#

* Pin 30 is NC for 88128 or CS2 for 88130.

White Electronic Designs Corp. reserves the right to change products or speciﬁcations without notice.

April 2005

Rev. 17

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

12 3 4 5 6 7 8

中文翻译

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与EDI88128LPXNM相关器件

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EDI88128P	ETC	获取价格	128K X 8 STATIC RAM CMOS MONOLITHIC
EDI88128P100CI	WEDC	获取价格	Standard SRAM, 128KX8, 100ns, CMOS, CDIP32,
EDI88128P100LM	WEDC	获取价格	Standard SRAM, 128KX8, 100ns, CMOS, CDSO32,
EDI88128P100TI	WEDC	获取价格	Standard SRAM, 128KX8, 100ns, CMOS, CDIP32,
EDI88128P100TM	WEDC	获取价格	Standard SRAM, 128KX8, 100ns, CMOS, CDIP32,
EDI88128P100ZI	WEDC	获取价格	Standard SRAM, 128KX8, 100ns, CMOS, CZIP32,
EDI88128P35CM	WEDC	获取价格	Standard SRAM, 128KX8, 35ns, CMOS, CDIP32,
EDI88128P35FB	WEDC	获取价格	Standard SRAM, 128KX8, 35ns, CMOS, CDFP32,
EDI88128P35FM	WEDC	获取价格	Standard SRAM, 128KX8, 35ns, CMOS, CDFP32,
EDI88128P35LI	WEDC	获取价格	Standard SRAM, 128KX8, 35ns, CMOS, CDSO32,

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