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ECLSOIC8EVB

更新时间: 2024-11-17 22:24:35
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安森美 - ONSEMI /
页数 文件大小 规格书
20页 203K
描述
Evaluation Board Manual for High Frequency SOIC 8

ECLSOIC8EVB 数据手册

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ECLSOIC8EVB  
Evaluation Board Manual  
for High Frequency SOIC 8  
http://onsemi.com  
EVALUATION BOARD MANUAL  
Board Lay−Up  
INTRODUCTION  
The 8−lead SOIC evaluation board is implemented in four  
layers with split (dual) power supplies (Figure 2.  
Evaluation Board Lay−up). For standard ECL lab setup and  
test, a split (dual) power supply is essential to enable the  
50 W internal impedance in the oscilloscope as a termination  
for ECL devices. The first layer or primary trace layer is  
0.008thick Rogers RO4003 material, which is designed to  
have equal electrical length on all signal traces from the  
device under the test (DUT) to the sense output. The second  
layer is the 1.0 oz copper ground plane and a portion of the  
ON Semiconductor has developed an evaluation board for  
the devices in 8−lead SOIC package. These evaluation  
boards are offered as a convenience for the customers  
interested in performing their own engineering assessment  
on the general performance of the 8−lead SOIC device  
samples. The board provides a high bandwidth 50 W  
controlled impedance environment. The pictures in Figure 1  
show the top and bottom view of the evaluation board, which  
can be configured in several different ways, depending on  
device under test (See Table 1. Configuration List).  
This evaluation board manual contains:  
plane is the V power plane. The FR4 dielectric material is  
EE  
placed between second and third layer and between third and  
fourth layer. The third layer is also 1.0 oz copper ground  
Information on 8−lead SOIC Evaluation Board  
Assembly Instructions  
Appropriate Lab Setup  
plane and a portion of this layer is V power plane. The  
CC  
fourth layer is the secondary trace layer.  
Bill of Materials  
This manual should be used in conjunction with the device  
data sheet, which contains full technical details on the device  
specifications and operation.  
Figure 1. Top and Bottom View of the 8−lead SOIC Evaluation Board  
Semiconductor Components Industries, LLC, 2004  
1
Publication Order Number:  
August, 2004 − Rev. 1  
ECLSOIC8EVB/D  
 

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