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E0C6233D PDF预览

E0C6233D

更新时间: 2024-11-21 19:03:03
品牌 Logo 应用领域
精工 - SEIKO 时钟外围集成电路
页数 文件大小 规格书
10页 106K
描述
4-BIT, MROM, 0.032768MHz, MICROCONTROLLER, UUC, DIE

E0C6233D 数据手册

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PF592-05  
E0C6233  
4-bit Single Chip Microcomputer  
Core CPU Architecture  
SVD Circuit/Comparator  
Event Counter  
DESCRIPTION  
The E0C6233 is an advanced single-chip CMOS 4-bit microcomputer consisting of the E0C6200 4-bit core  
CPU. It also contains the ROM, RAM, LCD driver, event counter, SVD circuit, stopwatch counter and time base  
counter. With wide voltage range and low power consumption, the E0C6233 provides an excellent solution for  
the low-power consumption systems with manganese dry cell.  
FEATURES  
CMOS LSI 4-bit parallel processing  
Clock .....................................................32.768kHz (Typ.)/500kHz (Typ.) (selectable by software)  
Instruction set........................................108 instructions  
Instruction cycle time ............................153µsec, 214µsec or 366µsec at 32kHz  
(depending on instruction)  
10µsec, 14µsec or 24µsec at 500kHz  
(depending on instruction)  
ROM capacity .......................................3,072 × 12 bits  
RAM capacity ........................................256 × 4 bits  
Input port ...............................................5 bits (pull-down resistors are available by mask option)  
Output port ............................................4 bits (general purpose)  
2 bits (buzzer output): BZ, BZ  
1 bit (lamp output)  
1 bit (clock output)  
I/O port ..................................................8 bits  
LCD driver .............................................40 segments × 3 commons/40 segments × 4 commons  
(1/3 or 1/4 duty is selectable by mask option)  
Built-in time base counter  
Built-in serial interface ..........................Clock synchronous  
Built-in stopwatch counter  
Built-in watchdog timer  
Event counter ........................................8 lines  
Built-in AMP ..........................................Operational AMP for MOS input analog comparator  
Built-in SVD...........................................1.2 ± 0.1V/2.4 ± 0.1V (supply voltage detector)  
Interrupts ...............................................External : Input interrupt  
2 lines  
2 lines  
Internal : Timer interrupt  
Serial interface interrupt 1 line  
HALT mode (32kHz)  
Current consumption ............................E0C62L33  
: 1.0µA (Typ.)  
: 1.5µA (Typ.)  
: 2.0µA (Typ.)  
E0C6233  
HALT mode (32kHz)  
E0C62A33  
HALT mode (32kHz)  
OPERATING mode (500kHz) : 135µA (Typ.)  
Package ................................................QFP5-100pin (plastic)  
Die form  
LINE UP  
Model  
Supply voltage  
1.5V (0.9V to 1.7V)  
3.0V (1.8V to 3.5V)  
3.0V (2.2V to 3.5V)  
Clock  
32kHz (Crystal oscillation)  
E0C62L33  
E0C6233  
E0C62A33  
32kHz (Crystal oscillation)  
32kHz (Crystal oscillation) & 500kHz (Ceramic or CR oscillation)  
SEIKO EPSON CORPORATION  
1

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