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E0C60L05D PDF预览

E0C60L05D

更新时间: 2024-01-16 12:03:46
品牌 Logo 应用领域
精工 - SEIKO 时钟外围集成电路
页数 文件大小 规格书
8页 80K
描述
4-BIT, MROM, 0.08MHz, MICROCONTROLLER, UUC, DIE

E0C60L05D 技术参数

生命周期:Obsolete零件包装代码:DIE
包装说明:DIE,Reach Compliance Code:unknown
HTS代码:8542.31.00.01风险等级:5.84
具有ADC:YES其他特性:OPERATES AT 1.5V NEGATIVE SUPPLY
地址总线宽度:位大小:4
最大时钟频率:0.08 MHzDAC 通道:NO
DMA 通道:NO外部数据总线宽度:
JESD-30 代码:X-XUUC-NI/O 线路数量:12
最高工作温度:70 °C最低工作温度:-20 °C
PWM 通道:NO封装主体材料:UNSPECIFIED
封装代码:DIE封装形状:UNSPECIFIED
封装形式:UNCASED CHIP认证状态:Not Qualified
ROM可编程性:MROM速度:0.08 MHz
最大供电电压:2 V最小供电电压:1.2 V
标称供电电压:1.5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子形式:NO LEAD端子位置:UPPER
uPs/uCs/外围集成电路类型:MICROCONTROLLERBase Number Matches:1

E0C60L05D 数据手册

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E0C6005  
PIN DESCRIPTION  
Pin name  
DD  
Pin No.  
52  
51  
55  
48  
47  
46  
49, 50  
53  
54  
3–6  
56–59  
7–10  
18–29  
33–40  
41–44  
14  
11  
12, 13  
17  
In/Out  
Function  
V
V
V
V
V
V
(I)  
(I)  
O
O
O
O
I
O
I
Power source (+) terminal  
Power source (-) terminal  
SS  
S1  
L1  
L2  
L3  
Oscillation and internal logic system regulated voltage output terminal  
LCD system regulated voltage output terminal  
LCD system booster output terminal  
LCD system booster output terminal  
Booster capacitor connecting terminal  
Crystal or CR oscillation input terminal  
Crystal or CR oscillation output terminal  
Input terminal  
CA, CB  
OSC1  
OSC2  
K00–K03  
P00–P03  
R00–R03  
SEG0–19  
I/O I/O terminal  
O
O
Output terminal  
LCD segment output terminal  
(convertible to DC output terminal by mask option)  
LCD common output terminal  
COM0–3  
CS  
RS  
TH1, TH2  
ADOUT  
RESET  
TEST  
O
I
O
O
O
I
A/D converter CR oscillation input terminal  
A/D converter CR oscillation output terminal  
A/D converter CR oscillation output terminal  
A/D converter oscillation frequency output terminal  
Initial setting input terminal  
32  
31  
I
Test input terminal  
BASIC EXTERNAL CONNECTION DIAGRAM  
Piezo Buzzer Single Terminal Driving  
LCD  
PANEL  
K00  
CA  
CB  
C1  
I
K03  
V
L1  
L2  
L3  
Connection depending  
on power supply and  
LCD panel specification.  
C
3
4
V
V
P00  
C
I/O  
V
DD  
P03  
CG  
OSC1  
X'tal  
E0C6005/60L05  
OSC2  
C2  
[The potential of the substrate  
(back of the chip) is VDD.]  
1.5 V  
or  
3.0 V  
V
S1  
RESET  
TEST  
Vss  
R00  
R02  
R03  
Cp  
O
Piezo  
Buzzer  
RS TH1 TH2  
CAD  
Coil  
X'tal  
Crystal oscillator  
Trimmer capacitor  
Capacitor  
32.768 kHz CI(MAX) = 35 k  
CG  
5–25 pF  
0.1 µF  
C1, C2, C3, C4  
Cp  
TH1, TH2  
Capacitor  
3.3 µF  
Thermistor  
Resistor  
50 kΩ  
RS  
49.8 kΩ  
2,200 pF  
CAD  
Capacitor  
Note: The above table is simply an example, and is not guaranteed to work.  
3

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