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DSTEMP-I/SS PDF预览

DSTEMP-I/SS

更新时间: 2024-11-20 19:51:11
品牌 Logo 应用领域
美国微芯 - MICROCHIP 光电二极管外围集成电路
页数 文件大小 规格书
38页 543K
描述
Parallel I/O Port

DSTEMP-I/SS 技术参数

生命周期:Active包装说明:SSOP,
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.76
JESD-30 代码:R-PDSO-G28长度:10.2 mm
I/O 线路数量:16端口数量:2
端子数量:28最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH筛选级别:TS 16949
座面最大高度:2 mm最大供电电压:5.5 V
最小供电电压:2 V标称供电电压:4.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
宽度:5.3 mmuPs/uCs/外围集成电路类型:PARALLEL IO PORT, GENERAL PURPOSE
Base Number Matches:1

DSTEMP-I/SS 数据手册

 浏览型号DSTEMP-I/SS的Datasheet PDF文件第2页浏览型号DSTEMP-I/SS的Datasheet PDF文件第3页浏览型号DSTEMP-I/SS的Datasheet PDF文件第4页浏览型号DSTEMP-I/SS的Datasheet PDF文件第5页浏览型号DSTEMP-I/SS的Datasheet PDF文件第6页浏览型号DSTEMP-I/SS的Datasheet PDF文件第7页 
MCP23016  
16-Bit I2CI/O Expander  
Features  
Package Types  
• 16-bit remote bidirectional I/O port  
- 16 I/O pins default to 16 inputs  
PDIP, SOIC, SSOP  
Vss  
GP1.0  
GP1.1  
GP1.2  
GP1.3  
INT  
GP1.4  
VSS  
CLK  
TP  
GP1.5  
GP1.6  
GP1.7  
SCL  
• 1  
2
3
4
5
6
7
8
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
GP0.7  
GP0.6  
GP0.5  
GP0.4  
GP0.3  
GP0.2  
GP0.1  
GP0.0  
VDD  
VSS  
• Fast I2C™ bus clock frequency (0 - 400 kbits/s)  
• Three hardware address pins allow use of up to  
eight devices  
• High-current drive capability per I/O: ±25 mA  
• Open-drain interrupt output on input change  
• Interrupt port capture register  
9
10  
11  
12  
13  
14  
A2  
A1  
A0  
SDA  
• Internal Power-On Reset (POR)  
• Polarity inversion register to configure the polarity  
of the input port data  
• Compatible with most microcontrollers  
• Available temperature range:  
- Industrial (I): -40°C to +85°C  
QFN  
28272625242322  
GP1.2  
1
21  
GP0.3  
GP0.2  
GP0.1  
GP0.0  
VDD  
GP1.3  
INT  
20  
19  
18  
17  
16  
15  
2
3
4
5
6
7
CMOS Technology  
MCP23016  
GP1.4  
VSS  
• Operating Supply Voltage: 2.0V to 5.5V  
• Low standby current  
VSS  
A2  
CLK  
TP  
8 9 1011121314  
Packages  
• 28-pin PDIP, 300 mil; 28-pin SOIC, 300 mil  
• 28-pin SSOP, 209 mil; 28-pin QFN, 6x6 mm  
Block Diagram  
Low Pass  
Filter  
Interrupt  
INT  
Logic  
A0  
A1  
A2  
IARES  
16 Bits  
Address  
I2C™ Bus  
SCL  
SDA  
Decoder  
Interface/  
Protocol  
Handler  
GP0.0 to GP0.7  
GP1.0 to GP1.7  
I/O  
Port  
I2C™ Bus  
Control  
CLKIN  
TP  
Clock  
Gen  
Write pulse  
Read pulse  
Power-on  
Reset  
VDD  
VSS  
8-Bit  
Configuration  
Registers  
Control  
© 2007 Microchip Technology Inc.  
DS20090C-page 1  

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