Datasheet > DSPIC33EP128GS806

DSPIC33EP128GS806

更新时间： 2024-01-13 17:24:46

品牌	Logo	应用领域
美国微芯 - MICROCHIP		/
页数	文件大小	规格书
484页	5042K
描述
16-Bit Digital Signal Controllers for Digital Power Applications with Interconnected High-Speed PWM, ADC, PGA and Comparators

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DSPIC33EP128GS806 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	包装说明：	TQFP-64
Reach Compliance Code：	compliant	风险等级：	2.32
具有ADC：	YES	其他特性：	ADC SAMPLE AND HOLD (5-CH 12-BIT)
位大小：	16	最大时钟频率：	60 MHz
DAC 通道：	YES	DMA 通道：	YES
JESD-30 代码：	S-PQFP-G64	JESD-609代码：	e3
长度：	10 mm	I/O 线路数量：	51
端子数量：	64	片上程序ROM宽度：	8
最高工作温度：	85 °C	最低工作温度：	-40 °C
PWM 通道：	YES	封装主体材料：	PLASTIC/EPOXY
封装代码：	TFQFP	封装形状：	SQUARE
封装形式：	FLATPACK, THIN PROFILE, FINE PITCH	RAM（字节）：	8192
ROM（单词）：	131072	ROM可编程性：	FLASH
筛选级别：	TS 16949	座面最大高度：	1.2 mm
最大供电电压：	3.6 V	最小供电电压：	3 V
标称供电电压：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Matte Tin (Sn) - annealed	端子形式：	GULL WING
端子节距：	0.5 mm	端子位置：	QUAD
宽度：	10 mm	uPs/uCs/外围集成电路类型：	MICROCONTROLLER
Base Number Matches：	1

DSPIC33EP128GS806 数据手册

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dsPIC33EPXXXGS70X/80X FAMILY

16-Bit Digital Signal Controllers for Digital Power Applications with

Interconnected High-Speed PWM, ADC, PGA and Comparators

Operating Conditions

Advanced Analog Features

• 3.0V to 3.6V, -40°C to +85°C, DC to 70 MIPS

• 3.0V to 3.6V, -40°C to +125°C, DC to 60 MIPS

• High-Speed ADC module:

- 12-bit with four dedicated SAR ADC cores

and one shared SAR ADC core

Flash Architecture

- Configurable resolution (up to 12-bit) for each

ADC core

• Dual Partition Flash Program Memory with

LiveUpdate:

- Up to 3.25 Msps conversion rate per channel

at 12-bit resolution

- Supports programming while operating

- Supports partition soft swap

- 11 to 22 single-ended inputs

- Dedicated result buffer for each analog channel

- Flexible and independent ADC trigger sources

- Two digital comparators

Core: 16-Bit dsPIC33E CPU

• Code-Efficient (C and Assembly) Architecture

• Two 40-Bit Wide Accumulators

- Two oversampling filters for increased

resolution

• Single-Cycle (MAC/MPY) with Dual Data Fetch

• Single-Cycle Mixed-Sign MUL plus

Hardware Divide

•

Four Rail-to-Rail Comparators with Hysteresis:

- Dedicated 12-bit Digital-to-Analog Converter

(DAC) for each analog comparator

• 32-Bit Multiply Support

• Four Additional Working Register Sets (reduces

context switching)

- Up to two DAC reference outputs

- Up to two external reference inputs

• Two Programmable Gain Amplifiers:

- Single-ended or independent ground reference

- Five selectable gains (4x, 8x, 16x, 32x and 64x)

- 40 MHz gain bandwidth

Clock Management

• ±0.9% Internal Oscillator

• Programmable PLLs and Oscillator Clock Sources

• Fail-Safe Clock Monitor (FSCM)

• Independent Watchdog Timer (WDT)

• Fast Wake-up and Start-up

Interconnected SMPS Peripherals

• Reduces CPU Interaction to Improve Performance

• Flexible PWM Trigger Options for

ADC Conversions

Power Management

• Low-Power Management modes (Sleep,

Idle, Doze)

• High-Speed Comparator Truncates PWM

(15 ns typical):

• Integrated Power-on Reset and Brown-out Reset

• 0.5 mA/MHz Dynamic Current (typical)

• 20 μA IPD Current (typical)

- Supports Cycle-by-Cycle Current-mode control

- Current Reset mode (variable frequency)

Timers/Output Compare/Input Capture

High-Speed PWM

• Five 16-Bit and up to Two 32-Bit Timers/Counters

• Eight PWM Generators (two outputs per generator)

• Individual Time Base and Duty Cycle for each PWM

• Four Output Compare (OC) modules, Configurable

as Timers/Counters

• 1.04 ns PWM Resolution (frequency, duty cycle,

dead time and phase)

• Four Input Capture (IC) modules

• Supports Center-Aligned, Redundant, Complementary

and True Independent Output modes

• Independent Fault and Current-Limit Inputs

• Output Override Control

• PWM Support for AC/DC, DC/DC, Inverters, PFC

and Lighting

 2016-2018 Microchip Technology Inc.

DS70005258C-page 1

12 3 4 5 6 7...484

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