Datasheet > DSPIC30F4020AT-30I/W

DSPIC30F4020AT-30I/W

更新时间： 2024-11-17 00:31:23

品牌	Logo	应用领域
美国微芯 - MICROCHIP		/
页数	文件大小	规格书
286页	2028K
描述
28/44-Pin dsPIC30F1010/202X Enhanced Flash

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dsPIC30F1010/202X

28/44-Pin dsPIC30F1010/202X Enhanced Flash

SMPS 16-Bit Digital Signal Controller

Peripheral Features:

Note: This data sheet summarizes features of this group

of dsPIC30F devices and is not intended to be a complete

• High-current sink/source I/O pins: 25 mA/25 mA

reference source. For more information on the CPU,

• Three 16-bit timers/counters; optionally pair up

16-bit timers into 32-bit timer modules

peripherals, register descriptions and general device

functionality, refer to the “dsPIC30F Family Reference

Manual” (DS70046). For more information on the device

instruction set and programming, refer to the “dsPIC30F/

33F Programmer’s Reference Manual” (DS70157).

• One 16-bit Capture input functions

• Two 16-bit Compare/PWM output functions

- Dual Compare mode available

High-Performance Modified RISC CPU:

• 3-wire SPI modules (supports 4 Frame modes)

• I²C^TMmodule supports Multi-Master/Slave mode

and 7-bit/10-bit addressing

• Modified Harvard architecture

• C compiler optimized instruction set architecture

• UART Module:

• 83 base instructions with flexible addressing

modes

- Supports RS-232, RS-485 and LIN 1.2

- Supports IrDA^®with on-chip hardware endec

- Auto wake-up on Start bit

- Auto-Baud Detect

• 24-bit wide instructions, 16-bit wide data path

• 12 Kbytes on-chip Flash program space

• 512 bytes on-chip data RAM

- 4-level FIFO buffer

• 16 x 16-bit working register array

• Up to 30 MIPS operation:

Power Supply PWM Module Features:

- Dual Internal RC

- 9.7 and 14.55 MHz (±1%) Industrial Temp

- 6.4 and 9.7 MHz (±1%) Extended Temp

- 32X PLL with 480 MHz VCO

• Four PWM generators with 8 outputs

• Each PWM generator has independent time base

and duty cycle

- PLL inputs ±3%

• Duty cycle resolution of 1.1 ns at 30 MIPS

• Individual dead time for each PWM generator:

- Dead-time resolution 4.2 ns at 30 MIPS

- Dead time for rising and falling edges

• Phase-shift resolution of 4.2 ns @ 30 MIPS

• Frequency resolution of 8.4 ns @ 30 MIPS

• PWM modes supported:

- External EC clock 6.0 to 14.55 MHz

- HS Crystal mode 6.0 to 14.55 MHz

• 32 interrupt sources

• Three external interrupt sources

• 8 user-selectable priority levels for each interrupt

• 4 processor exceptions and software traps

- Complementary

DSP Engine Features:

- Push-Pull

- Multi-Phase

• Modulo and Bit-Reversed modes

- Variable Phase

• Two 40-bit wide accumulators with optional

saturation logic

- Current Reset

- Current-Limit

• 17-bit x 17-bit single-cycle hardware fractional/

integer multiplier

• Independent Current-Limit and Fault Inputs

• Output Override Control

• Single-cycle Multiply-Accumulate (MAC)

operation

• Special Event Trigger

• 40-stage Barrel Shifter

• Dual data fetch

• PWM generated ADC Trigger

 2006-2014 Microchip Technology Inc.

DS70000178D-page 1

12 3 4 5 6 7...286

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