Low-Jitter Configurable HCSL-LVPECL Oscillator
DSC2042
Output Clock Frequencies
Table 1 lists the standard frequency configurations and the associated ordering information to be
used in conjunction with the ordering code. Customer defined combinations are available.
Table 1. Pre-programmed pin-selectable output frequency combinations
Freq Select Bits [FS2, FS1, FS0] – Default is [111]
Ordering
Info
Freq
(MHz)
000
156.25
125
001
0*
010
0*
011
0*
100
0*
101
0*
110
0*
111
100
156.25
0*
fOUT1
fOUT2
fOUT1
fOUT2
fOUT1
fOUT2
M0001
M0002
0*
0*
0*
0*
0*
0*
156.25
156.25
0*
0*
0*
0*
0*
0*
0*
0*
0*
0*
100
0*
100
MXXXXX
Contact factory for additional configurations.
Frequency select bit are weakly tied high so if left unconnected the default setting will be [111] and
the device will output the associated frequency highlighted in Bold.
0* – denotes invalid selection, output frequency is not specified.
Absolute Maximum Ratings
Ordering Code
Item
Min
Max
Unit Condition
Temp Range
E: -20 to 70
I: -40 to 85
Packing
T: Tape & Reel
: Tube
Supply Voltage
-0.3
+4.0
V
Input Voltage
Junction Temp
Storage Temp
Soldering Temp
-0.3 VDD+0.3
V
°C
°C
°C
V
-
-55
-
+150
+150
+260
DSC2042 F I 2
xxxxx
T
40sec max.
Package
F: 3.2x2.5mm
Stability
1: ±50ppm
2: ±25ppm
5: ±10ppm
Freq (MHz)
See Freq. table
ESD
HBM
MM
-
4000
400
CDM
1500
Note: 1000+ years of data retention on internal memory
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DSC2042 Page 3 MK-Q-B-P-D-12042612-2