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DS90UR241QVS PDF预览

DS90UR241QVS

更新时间: 2024-01-03 02:11:59
品牌 Logo 应用领域
美国国家半导体 - NSC 驱动器接口集成电路光电二极管
页数 文件大小 规格书
26页 1102K
描述
5-43 MHz DC-Balanced 24-Bit FPD-Link II Serializer and Deserializer Chipset

DS90UR241QVS 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:ActiveReach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
Factory Lead Time:6 weeks风险等级:0.91
Is Samacsys:N差分输出:YES
驱动器位数:1接口集成电路类型:LINE DRIVER
JESD-30 代码:S-PQFP-G48JESD-609代码:e3
长度:7 mm湿度敏感等级:3
功能数量:1端子数量:48
最高工作温度:105 °C最低工作温度:-40 °C
最小输出摆幅:2 V输出特性:DIFFERENTIAL
输出极性:COMPLEMENTARY封装主体材料:PLASTIC/EPOXY
封装代码:TFQFP封装等效代码:TQFP48,.35SQ
封装形状:SQUARE封装形式:FLATPACK, THIN PROFILE, FINE PITCH
峰值回流温度(摄氏度):260电源:3.3 V
认证状态:Not Qualified最大接收延迟:
接收器位数:1筛选级别:AEC-Q100
座面最大高度:1.2 mm子类别:Line Driver or Receivers
最大压摆率:105 mA标称供电电压:3.3 V
电源电压1-最大:3.6 V电源电压1-分钟:3 V
电源电压1-Nom:3.3 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7 mmBase Number Matches:1

DS90UR241QVS 数据手册

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September 4, 2009  
DS90UR241Q  
DS90UR124Q  
5-43 MHz DC-Balanced 24-Bit FPD-Link II Serializer and  
Deserializer Chipset  
24:1 interface compression  
General Description  
Embedded clock with DC Balancing supports AC-coupled  
The DS90UR241/124 Chipset translates a 24-bit parallel bus  
data transmission  
into a fully transparent data/control FPD-Link II LVDS serial  
Capable to drive up to 10 meters shielded twisted-pair  
stream with embedded clock information. This chipset is ide-  
cable  
ally suited for driving graphical data to displays requiring 18-  
No reference clock required (deserializer)  
bit color depth - RGB666 + HS, VS, DE + 3 additional general  
purpose data channels. This single serial stream simplifies  
transferring a 24-bit bus over PCB traces and cable by elim-  
inating the skew problems between parallel data and clock  
paths. It saves system cost by narrowing data paths that in  
turn reduce PCB layers, cable width, and connector size and  
pins.  
Meets ISO 10605 ESD - Greater than 8 kV HBM ESD  
structure  
Hot plug support  
EMI Reduction - Serializer accepts spread spectrum input;  
data randomization and shuffling on serial link;  
Deserializer provides Adjustable PTO (progressive turn-  
on) LVCMOS outputs  
@Speed BIST (built-in self test) to validate LVDS  
transmission path  
Individual power-down controls for both Transmitter and  
Receiver  
Power supply range 3.3V ± 10%  
The DS90UR241/124 incorporates FPD-Link II LVDS signal-  
ing on the high-speed I/O. FPD-Link II LVDS provides a low  
power and low noise environment for reliably transferring data  
over a serial transmission path. By optimizing the Serializer  
output edge rate for the operating frequency range EMI is fur-  
ther reduced.  
In addition, the device features pre-emphasis to boost signals  
over longer distances using lossy cables. Internal DC bal-  
anced encoding/decoding is used to support AC-Coupled  
interconnects. Using National Semiconductor’s proprietary  
random lock, the Serializer’s parallel data are randomized to  
the Deserializer without the need of REFCLK.  
48-pin TQFP package for Transmitter and 64-pin TQFP  
package for Receiver  
Temperature range -40°C to +105°C  
Backward compatible mode with DS90C241/DS90C124  
Applications  
Features  
Automotive Central Information Display  
Supports displays with 18-bit color depth  
Automotive Instrument Cluster Display  
5MHz to 43MHz pixel clock  
Automotive Heads-Up Display  
Automotive grade product AEC-Q100 grade 2 qualified  
Remote Camera-based Driver Assistance Systems  
Applications Diagram  
20194527  
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
© 2009 National Semiconductor Corporation  
201945  
www.national.com  

DS90UR241QVS 替代型号

型号 品牌 替代类型 描述 数据表
DS90UR241IVS NSC

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5-43 MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer

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