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DS90UB927Q-Q1 PDF预览

DS90UB927Q-Q1

更新时间: 2024-11-24 12:51:43
品牌 Logo 应用领域
德州仪器 - TI 光电二极管
页数 文件大小 规格书
56页 1052K
描述
5MHz - 85MHz 24-bit Color FPD-Link III Serializer with Bidirectional Control Channel

DS90UB927Q-Q1 数据手册

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DS90UB927-Q1, DS90UB927Q, DS90UB927Q-Q1  
www.ti.com  
SNLS416B JUNE 2012  
DS90UB927Q 5MHz - 85MHz 24-bit Color FPD-Link III Serializer with Bidirectional Control  
Channel  
Check for Samples: DS90UB927-Q1, DS90UB927Q, DS90UB927Q-Q1  
1
FEATURES  
DC-balanced & scrambled Data with  
Embedded Clock  
2
Bidirectional control channel interface with I2C  
compatible serial control bus  
Supports repeater application  
Internal pattern generation  
Low EMI FPD-Link video input  
Low power modes minimize power dissipation  
Supports high definition (720p) digital video  
format  
Automotive grade product: AEC-Q100 Grade 2  
qualified  
5MHz – 85MHz PCLK supported  
>8kV HBM and ISO 10605 ESD rating  
Backward compatible modes  
RGB888 + VS, HS, DE and I2S audio supported  
Up to 4 I2S Digital Audio inputs for surround  
sound applications  
APPLICATIONS  
4 Bidirectional GPIO channels with 2 dedicated  
pins  
Automotive Display for Navigation  
Rear Seat Entertainment Systems  
Automotive Driver Assistance  
Single 3.3V supply with 1.8V or 3.3V  
compatible LVCMOS I/O interface  
AC-coupled STP Interconnect up to 10 meters  
Automotive Megapixel Camera Systems  
DESCRIPTION  
The DS90UB927Q serializer, in conjunction with a DS90UB928Q or DS90UB926Q deserializer, provides a  
complete digital interface for concurrent transmission of high-speed video, audio, and control data for automotive  
display and image sensing applications.  
The chipset is ideally suited for automotive video display systens with HD formats and automotive vision systems  
with megapixel resolutions. The DS90UB927Q incorporates an embedded bidirectional control channel and low  
latency GPIO controls. This device translates a FPD-Link video interface into a single-pair high-speed serialized  
interface. The FPD-Link III serial bus scheme supports full duplex, high speed forward channel data transmission  
and low-speed back channel communication over a single differential link. Consolidation of audio, video, and  
control data over a single differential pair reduces the interconnect size and weight, while also eliminating skew  
issues and simplifying system design.  
The DS90UB927Q serializer embeds the clock and level shifts the signals to high-speed differential signaling. Up  
to 24 RGB data bits are serialized along with three video control signals, and up to four I2S data inputs.  
The FPD-Link data interface allows for easy interfacing with data sources while also minimizing EMI and bus  
width. EMI on the high-speed FPD-Link III bus is minimized using low voltage differential signaling, data  
scrambling and randomization, and dc-balancing.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2012, Texas Instruments Incorporated  

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