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DS8922AN/NOPB PDF预览

DS8922AN/NOPB

更新时间： 2024-11-29 15:43:15
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管接口集成电路驱动器
页数 文件大小 规格书
20页 1290K
描述
DUAL LINE TRANSCEIVER, PDIP16, PLASTIC, DIP-16

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中文翻译

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DS8922AN/NOPB 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：DIP
包装说明：DIP, DIP16,.3针数：16
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.36
差分输出：YES驱动器位数：2
高电平输入电流最大值：0.00002 A输入特性：DIFFERENTIAL SCHMITT TRIGGER
接口集成电路类型：LINE TRANSCEIVER接口标准：EIA-422; ESDI; ST412; ST506
JESD-30 代码：R-PDIP-T16JESD-609代码：e3
长度：19.304 mm湿度敏感等级：1
功能数量：2端子数量：16
最高工作温度：70 °C最低工作温度：
最小输出摆幅：2.5 V最大输出低电流：0.008 A
输出极性：COMPLEMENTARY封装主体材料：PLASTIC/EPOXY
封装代码：DIP封装等效代码：DIP16,.3
封装形状：RECTANGULAR封装形式：IN-LINE
峰值回流温度（摄氏度）：260电源：5 V
认证状态：Not Qualified最大接收延迟：20 ns
接收器位数：2座面最大高度：5.08 mm
子类别：Line Driver or Receivers最大压摆率：78 mA
标称供电电压：5 V表面贴装：NO
技术：BIPOLAR温度等级：COMMERCIAL
端子面层：Matte Tin (Sn)端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：40最大传输延迟：15 ns
宽度：7.62 mmBase Number Matches：1

DS8922AN/NOPB 数据手册

 浏览型号DS8922AN/NOPB的Datasheet PDF文件第2页浏览型号DS8922AN/NOPB的Datasheet PDF文件第3页浏览型号DS8922AN/NOPB的Datasheet PDF文件第4页浏览型号DS8922AN/NOPB的Datasheet PDF文件第5页浏览型号DS8922AN/NOPB的Datasheet PDF文件第6页浏览型号DS8922AN/NOPB的Datasheet PDF文件第7页 
DS8922, DS8922A, DS8923A  
www.ti.com  
SNLS373B –JUNE 1998–REVISED APRIL 2013  
DS8922/DS8922A/DS8923A TRI-STATE RS-422 Dual Differential Line Driver and Receiver  
Pairs  
Check for Samples: DS8922, DS8922A, DS8923A  
1
FEATURES  
DESCRIPTION  
2
•
12 ns Typical Propagation Delay  
Output Skew—±0.5 ns Typical  
The DS8922/22A and DS8923A are Dual Differential  
Line Driver and Receiver pairs. These devices are  
designed specifically for applications meeting the  
ST506, ST412 and ESDI Disk Drive Standards. In  
addition, the devices meet the requirements of the  
EIA Standard RS-422.  
•
•
Meets the Requirements of EIA Standard RS-  
422  
•
•
Complementary Driver Outputs  
High Differential or Common-Mode Input  
Voltage Ranges of ±7V  
These devices offer an input sensitivity of 200 mV  
over  
a
±7V common mode operating range.  
•
±0.2V Receiver Sensitivity over the Input  
Voltage Range  
Hysteresis is incorporated (typically 70 mV) to  
improve noise margin for slowly changing input  
waveforms. An input fail-safe circuit is provided such  
that if the receiver inputs are open the output  
assumes the logical one state.  
•
•
•
•
Receiver Input Fail-Safe Circuitry  
Receiver Input Hysteresis—70 mV typical  
Glitch Free Power Up/Down  
The DS8922A and DS8923A drivers are designed to  
provide unipolar differential drive to twisted pair or  
parallel wire transmission lines. Complementary  
outputs are logically ANDed and provide an output  
skew of 0.5 ns (typ.) with propagation delays of 12  
ns.  
TRI-STATE Outputs  
Both devices feature TRI-STATE outputs. The  
DS8922/22A have independent control functions  
common to a driver and receiver pair. The DS8923A  
has separate driver and receiver control functions.  
Power up/down circuitry is featured which will TRI-  
STATE the outputs and prevent erroneous glitches on  
the transmission lines during system power up or  
power down operation.  
The DS8922/22A and DS8923A are designed to be  
compatible with TTL and CMOS.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 1998–2013, Texas Instruments Incorporated  
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DS8922N TI

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DS8922N/NOPB TI

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