EVALUATION KIT AVAILABLE
DS3922
High-Speed Current Mirror and
Integrated FETs for DC-DC Controller
General Description
Benefits and Features
● Accurate Burst-Mode RSSI Measurement with Two
The DS3922 high-speed current mirror integrates high-
voltage devices necessary for monitoring the burst mode
receive power signal in avalanche photodiode (APD) bias-
ing and OLT applications. The device has two small and
one large gain current mirror outputs to monitor the APD
current. An adjustable current clamp limits current through
the APD. The clamp also features an external shutdown.
An integrated FET is also provided that can be used to
quickly clamp the high-voltage bias to ground in the case
of high optical input power. Integrated low-voltage FET
circuits can be used to create buck, boost, and inverting
DC-DC converters for efficient laser bias and EML bias
applications.
Current Mirror Outputs Improves Dynamic Range
• -32dBm to -5dBm Optical Input Range
• ±0.5dB Accuracy
• Sampling Period as Short as 300ns
• Pin Discharge Option
● Low-Noise APD Bias with Shutdown Options
Reduces Receiver Sensitivity
• 15V to 76V APD Bias
• External Capacitor Connection for Controlled RC
Time Constant of APD Voltage Filter
• Current Clamp with Adjustable Limit and External
Shutdown with Limit Status
The DS3922 is available in a 24-pin TQFN package and
operates over an extended -40°C to +95°C temperature
range.
• High-Voltage Switch FET for APD Fast Shutdown
● Supports Additional DC-DC Functions
• Low-Voltage Synchronous Buck FETs for Efficient
DFB Bias
Block Diagram
• Low-Voltage pMOSFET for Generating Negative
Bias Voltage for EMLs
LOW-VOLTAGE
V
DS3922
CC
FET CIRCUITS
● Small Package Reduces Total Solution Size and Cost
LVCC
AVCC
(2.85V TO 3.63V)
• 3.5mm x 3.5mm, 24-Pin TQFN Package with
Exposed Pad
(WITHIN ±0.1V OF
HVGND AND GND)
HIGH-VOLTAGE
AND MIRROR CIRCUITS
MIRIN
LVGND
I
1
AVCC
4V
0.8I
1
0.2I
1
0.1I
1
Applications
●ꢀ AvalancheꢀPhotodiodeꢀ(APD)ꢀMonitoring
●ꢀ GPONꢀOLT
●ꢀ 10GPONꢀOLT
●ꢀ EMLꢀBias
MIRCAP
HIGH-POWER DML,
DFB, LDD, TXVCC
LVOUT3
(0 TO 4V)
OPEN-DRAIN nMOS
LVCC
ILIMS
RLIM
CURRENT
LIMIT
LVGND
LVGND
LVIN3
200µA
●ꢀ 10GꢀEPON
TEMP
LIMIT
EML NEGATIVE BIAS INVERTING SWITCHER LVIN2
LVCC
LVCC
ISRC/SHDN
Ordering Information appears at end of data sheet.
pMOS
1.8V
LVOUT2
(-3.7V TO LVCC)
OPEN-DRAIN pMOS
AVCC
LVGND
MIROUT
APDV
MIRIN
0.5V/V
For related parts and recommended products to use with this part, refer
to www.maximintegrated.com/DS3922.related.
EML, DFB, APC HIGH-EFFICIENCY BIAS LVIN1
LVCC LVCC
MIROUT
GND
HVD
pMOS
HVGND
HVG
LVOUT1
(0 TO LVCC)
NONOVERLAP
DRIVER
V
CC
nMOS
LVGND
LVGND
19-7400; Rev 1; 3/15