DS26522 Dual T1/E1/J1 Transceiver
TABLE OF CONTENTS
1.
2.
DETAILED DESCRIPTION...............................................................................................9
1.1 MAJOR OPERATING MODES.............................................................................................................9
FEATURE HIGHLIGHTS ................................................................................................10
2.1 GENERAL......................................................................................................................................10
2.2 LINE INTERFACE............................................................................................................................10
2.3 CLOCK SYNTHESIZER ....................................................................................................................10
2.4 JITTER ATTENUATOR .....................................................................................................................10
2.5 FRAMER/FORMATTER ....................................................................................................................10
2.6 SYSTEM INTERFACE ......................................................................................................................11
2.7 HDLC CONTROLLERS ...................................................................................................................12
2.8 TEST AND DIAGNOSTICS ................................................................................................................12
2.9 MICROCONTROLLER PARALLEL PORT.............................................................................................12
2.10
SLAVE SERIAL PERIPHERAL INTERFACE (SPI) FEATURES ............................................................12
3.
4.
5.
6.
7.
APPLICATIONS..............................................................................................................13
SPECIFICATIONS COMPLIANCE .................................................................................14
ACRONYMS AND GLOSSARY......................................................................................16
BLOCK DIAGRAMS.......................................................................................................17
PIN DESCRIPTIONS ......................................................................................................19
7.1 PIN FUNCTIONAL DESCRIPTION......................................................................................................19
FUNCTIONAL DESCRIPTION........................................................................................25
8.1 MICROPROCESSOR INTERFACE......................................................................................................25
8.
8.1.1
8.1.2
8.1.3
Parallel Port Mode................................................................................................................................ 25
SPI Serial Port Mode............................................................................................................................ 25
SPI Functional Timing Diagrams ......................................................................................................... 25
8.2 CLOCK STRUCTURE.......................................................................................................................28
8.2.1 Backplane Clock Generation ............................................................................................................... 28
8.3 RESETS AND POWER-DOWN MODES..............................................................................................29
8.4 INITIALIZATION AND CONFIGURATION..............................................................................................30
8.4.1
Example Device Initialization Sequence.............................................................................................. 30
8.5 GLOBAL RESOURCES ....................................................................................................................30
8.6 PORT RESOURCES ........................................................................................................................30
8.7 DEVICE INTERRUPTS .....................................................................................................................30
8.8 SYSTEM BACKPLANE INTERFACE ...................................................................................................32
8.8.1
8.8.2
8.8.3
8.8.4
8.8.5
8.8.6
Elastic Stores ....................................................................................................................................... 32
IBO Multiplexer..................................................................................................................................... 35
H.100 (CT Bus) Compatibility .............................................................................................................. 36
Receive and Transmit Channel Blocking Registers............................................................................. 37
Transmit Fractional Support (Gapped Clock Mode) ............................................................................ 37
Receive Fractional Support (Gapped Clock Mode) ............................................................................. 37
8.9 FRAMERS......................................................................................................................................38
8.9.1
8.9.2
8.9.3
8.9.4
8.9.5
8.9.6
8.9.7
T1 Framing........................................................................................................................................... 38
E1 Framing........................................................................................................................................... 41
T1 Transmit Synchronizer.................................................................................................................... 43
Signaling .............................................................................................................................................. 44
T1 Data Link......................................................................................................................................... 48
E1 Data Link......................................................................................................................................... 50
Maintenance and Alarms ..................................................................................................................... 51
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