DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
1 DETAILED DESCRIPTION
The DS26303 is a single-chip, 8-channel, short-haul line interface unit (LIU) for T1 (1.544Mbps) and E1
(2.048Mbps) applications. Eight independent receivers and transmitters are provided in an eLQFP package. The
LIUs can be individually selected for T1, J1, or E1 operation. The LIU requires a single reference clock called
MCLK. MCLK can be either 1.544MHz or 2.048MHz or a multiple thereof, and either frequency can be internally
adapted for T1, J1, or E1 mode. Internal impedance match provided for both transmit and receive paths reduces
external component count. The transmit waveforms are compliant to G.703 and T1.102 specifications. The
DS26303 provides software-selectable internal transmit termination for 100Ω T1 twisted pair, 110Ω J1 twisted pair,
120Ω E1 twisted pair, and 75Ω E1 coaxial applications. The transmitters have fast high-impedance capability and
can be individually powered down.
The receivers can function with up to 15dB of receive signal attenuation for T1 mode and E1 mode. The DS26303
can be configured as a 7-channel LIU with channel 1 used for nonintrusive monitoring in accordance with G.772.
The receivers and transmitters can be programmed into single-rail or dual-rail mode. AMI or HDB/B8ZS encoding
and decoding is selectable in single-rail mode. A 128-bit crystal-less on-board jitter attenuator for each LIU can be
placed in the receive or transmit directions. The jitter attenuator meets the ETS CTR12/13 ITU-T G.736, G.742,
G.823, and AT&T Pub 62411 specifications.
The DS26303 detects and generates AIS in accordance with T1.231, G.775, and ETS 300 233. Loss of signal is
detected in accordance with T1.231, G.775, and ETS 300 233. The DS26303 can perform digital, analog, remote,
and dual loopbacks on individual LIUs. JTAG boundary scan is provided for the digital pins.
The DS26303 can be configured using an 8-bit multiplexed or nonmultiplexed Intel or Motorola port, a 4-pin serial
port, or in limited modes of operation using hardware mode.
The analog AMI/HDB3 waveform of the E1 line or the AMI/B8ZS waveform of the T1 line is transformer coupled
into the RTIP and RRING pins of the DS26303. The user has the option to select internal termination of 75Ω,
100Ω, 110Ω, or 120Ω applications. The device recovers clock and data from the analog signal and passes it
through a selectable jitter attenuator, outputting the received line clock at RCLK and data at RPOS and RNEG.
The DS26303 receivers can recover data and clock for up to 15dB of attenuation of the transmitted signals in T1
and E1 mode. Receiver 1 can monitor the performance of receivers 2 to 8 or transmitters 2 to 8.
The DS26303 contains eight identical transmitters. Digital transmit data is input at TPOS/TNEG with reference to
TCLK. The data at these pins can be single-rail or dual-rail. This data is processed by waveshaping circuitry and
line drivers to output a pulse at TTIP and TRING in accordance with ANSI T1.102 for T1/J1 or G.703 for E1 mask.
The DS26303 drives the E1 or T1 line from the TTIP and TRING pins through a coupling transformer. The
DS26303 requires a 1:2 transformer for the transmit path and a 2:1 transformer for the receive path.
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