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DS26303_V01 PDF预览

DS26303_V01

更新时间: 2023-12-18 00:00:00
品牌 Logo 应用领域
美信 - MAXIM /
页数 文件大小 规格书
101页 1197K
描述
3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit

DS26303_V01 数据手册

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DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit  
LIST OF TABLES  
Table 2-1. T1-Related Telecommunications Specifications ........................................................................................ 7  
Table 2-2. E1-Related Telecommunications Specifications........................................................................................ 8  
Table 4-1. Pin Descriptions........................................................................................................................................ 11  
Table 4-2. Hardware Mode Configuration Examples................................................................................................. 20  
Table 4-3. Parallel Port Mode Selection and Pin Functions...................................................................................... 22  
Table 5-1. Primary Register Set ................................................................................................................................ 24  
Table 5-2. Secondary Register Set............................................................................................................................ 25  
Table 5-3. Individual LIU Register Set....................................................................................................................... 25  
Table 5-4. BERT Register Set ................................................................................................................................... 26  
Table 5-5. Primary Register Set Bit Map................................................................................................................... 27  
Table 5-6. Secondary Register Set Bit Map .............................................................................................................. 27  
Table 5-7. Individual LIU Register Set Bit Map.......................................................................................................... 28  
Table 5-8. BERT Register Bit Map ............................................................................................................................ 28  
Table 5-9. G.772 Monitoring Control ......................................................................................................................... 32  
Table 5-10. TST Template Select Transceiver Register ........................................................................................... 35  
Table 5-11. Template Selection................................................................................................................................. 35  
Table 5-12. Address Pointer for Bank Selection........................................................................................................ 37  
Table 5-13. MCLK Selections.................................................................................................................................... 42  
Table 5-14. Jitter Attenuator Bandwidth Selections................................................................................................... 43  
Table 5-15. PLL Clock Select .................................................................................................................................... 45  
Table 5-16. Clock A Select ........................................................................................................................................ 45  
Table 6-1. Telecommunications Specification Compliance for DS26303 Transmitters ............................................ 55  
Table 6-2. Registers Related to Control of DS26303 Transmitters........................................................................... 55  
Table 6-3. DS26303 Template Selections................................................................................................................. 56  
Table 6-4. LIU Front-End Values............................................................................................................................... 58  
Table 6-5. Loss Criteria T1.231, G.775, and ETS 300 233 Specifications................................................................ 60  
Table 6-6. AIS Criteria T1.231, G.775, and ETS 300 233 Specifications.................................................................. 61  
Table 6-7. AIS Detection and Reset Criteria ............................................................................................................. 61  
Table 6-8. Registers Related to AIS Detection.......................................................................................................... 61  
Table 6-9. BPV, Code Violation, and Excessive Zero Error Reporting ..................................................................... 62  
Table 6-10. Pseudorandom Pattern Generation........................................................................................................ 68  
Table 6-11. Repetitive Pattern Generation................................................................................................................ 68  
Table 7-1. Instruction Codes for IEEE 1149.1 Architecture....................................................................................... 76  
Table 7-2. ID Code Structure..................................................................................................................................... 77  
Table 7-3 Device ID Codes........................................................................................................................................ 77  
Table 8-1. Recommended DC Operating Conditions................................................................................................ 78  
Table 8-2. Capacitance.............................................................................................................................................. 78  
Table 8-3. DC Characteristics.................................................................................................................................... 78  
Table 9-1. Thermal Characteristics............................................................................................................................ 79  
Table 10-1. Transmitter Characteristics..................................................................................................................... 80  
Table 10-2. Receiver Characteristics......................................................................................................................... 80  
Table 10-3. Intel Read Mode Characteristics ............................................................................................................ 81  
Table 10-4. Intel Write Cycle Characteristics ............................................................................................................ 84  
Table 10-5. Motorola Read Cycle Characteristics..................................................................................................... 87  
Table 10-6. Motorola Write Cycle Characteristics ..................................................................................................... 90  
Table 10-7. Serial Port Timing Characteristics.......................................................................................................... 93  
Table 10-8. Transmitter System Timing .................................................................................................................... 94  
Table 10-9. Receiver System Timing......................................................................................................................... 95  
Table 10-10. JTAG Timing Characteristics................................................................................................................ 96  
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