DS2480B
A master reset cycle can also be generated by means of software. This may be necessary if the host for
any reason has lost synchronization with the device. The DS2480B will perform a master reset cycle
equivalent to the power-on reset if it detects start polarity in place of the stop bit. The host has several
options to generate this condition. These include making the UART generate a break signal, sending a
NULL character at a data rate of 4800bps and sending any character with parity enabled and selecting
space polarity for the parity bit. As with the power-on reset, the DS2480B requires a 1-Wire reset
command sent by the host at a data rate of 9600bps for calibration.
After the DS2480B has reached the Command Mode, the host can send commands such as 1-Wire Reset,
Pulse, Configuration, Search Accelerator, and Single Bit functions or switch over to the second static
state called Data Mode. In Data Mode the DS2480B simply converts bytes it receives at the TXD pin
into their equivalent 1-Wire waveforms and reports the results back to the host through the RXD pin. If
the Search Accelerator is on, each byte seen at TXD will generate a 12-bit sequence on the 1-Wire bus
(see Search Accelerator section for details). If the strong pullup to 5V is enabled (see Pulse Command),
each byte on the 1-Wire bus will be followed by a pause of predefined duration where the bus is pulled to
5V via a low-impedance transistor in the 1-Wire driver circuit.
While being in the Data Mode the DS2480B checks each byte received from the host for the reserved
code that is used to switch back to Command Mode. To be able to write any possible code (including the
reserved one) to the 1-Wire bus, the transition to the Command Mode is as follows: After having received
the code for switching to Command Mode, the device temporarily enters the Check Mode where it waits
for the next byte. If both bytes are the same, the byte is sent once to the 1-Wire bus and the device returns
to the Data Mode. If the second byte is different from the reserved code, it will be executed as command
and the device finally enters the Command Mode. As a consequence, if the reserved code that normally
switches to Command Mode is to be written to the 1-Wire bus, this code byte must be sent twice
(duplicated). This detail must be considered carefully when developing software drivers for the
DS2480B.
After having completed a memory function with a device on the 1-Wire bus it is recommended to issue a
Reset Pulse. This means that the DS2480B has to be switched to Command Mode. The host then sends
the appropriate command code and continues performing other tasks. If during this time a device arrives
at the 1-Wire bus it will generate a presence pulse. The DS2480B will recognize this unsolicited presence
pulse and notify the host by sending a byte such as XXXXXX01b. The Xs represent undefined bit values.
The fact that the host receives the byte unsolicited together with the pattern 01b in the least significant 2
bits marks the bus arrival. If the DS2480B is left in Data Mode after completing a memory function
command it will not report any bus arrival to the host.
COMMAND CODE OVERVIEW
The DS2480B is controlled by a variety of commands. All command codes are 8 bits long. The most
significant bit of each command code distinguishes between communication and configuration
commands. Configuration commands access the configuration registers. They can write or read any of the
configurable parameters. Communication commands use data of the configuration register in order to
generate activity on the 1-Wire bus and/or (dis)arm the strong pullup after every byte or (de)activate the
Search Accelerator without generating activity on the 1-Wire bus. Details on the command codes are
included in the State Transition diagram (Figure 2). A full explanation is given in the subsequent
Communication Commands and Configuration Commands sections.
Maxim Integrated.............................................................................................................................................................................................5
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