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DS1855E-100/T&R PDF预览

DS1855E-100/T&R

更新时间： 2024-01-27 18:24:39
品牌 Logo 应用领域
达拉斯 - DALLAS 电位器存储
页数 文件大小 规格书
20页 252K
描述
Dual Nonvolatile Digital Potentiometer and Secure Memory

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DS1855E-100/T&R 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Active零件包装代码：TSSOP
包装说明：0.173 INCH, TSSOP-14针数：14
Reach Compliance Code：not_compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.84
Is Samacsys：N其他特性：NONVOLATILE MEMORY; OTHER RESISTOR VALUE IS 10000 OHM WITH 100 TAP POSITION
标称带宽：1 kHz控制接口：2-WIRE SERIAL
转换器类型：DIGITAL POTENTIOMETERJESD-30 代码：R-PDSO-G14
JESD-609代码：e0长度：5 mm
湿度敏感等级：1功能数量：2
位置数：256端子数量：14
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP14,.25封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：240
电源：3/5 V认证状态：Not Qualified
电阻定律：LINEAR最大电阻容差：20%
最大电阻器端电压：3.3 V最小电阻器端电压：-0.3 V
座面最大高度：1.1 mm子类别：Digital Potentiometers
标称供电电压：3 V表面贴装：YES
标称温度系数：750 ppm/ °C温度等级：INDUSTRIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED标称总电阻：100000 Ω
宽度：4.4 mmBase Number Matches：1

DS1855E-100/T&R 数据手册

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DS1855  
MEMORY ORGANIZATION  
The DS1855’s serial EEPROM is internally organized with 256 words of 1 byte each. Each word requires  
an 8-bit address for random word addressing. The byte at address F9h determines the wiper setting for  
potentiometer 0, which contains 100 positions. Writing values above 63h to this address sets the wiper to  
its uppermost position, but the MSB is ignored. The byte at address F8h determines the wiper setting for  
potentiometer 1, which contains 256 positions (00h to FFh). Address locations FAh though FFh are  
reserved and should not be written.  
MEMORY  
NAME OF  
MEMORY  
LOCATION  
FUNCTION OF MEMORY LOCATION  
LOCATION  
00h – F7h  
F8h  
User Memory  
General-purpose user memory.  
Potentiometer 1 Setting Writing to this byte controls the setting of potentiometer 1, a 256-  
position pot. Valid settings are 00h to FFh.  
F9h  
Potentiometer 0 Setting Writing to this byte controls the setting of potentiometer 0, a 100-  
position pot. Valid settings are 00h to 63h. MSB is ignored.  
FAh  
Software Lock  
The three lower bits in this byte can be used to set write-protection  
to the 256-byte memory block.  
Configuration Byte  
B2 B1 B0  
B2: Writing this bit to a 1 protects the upper page of memory. If  
this bit is set, memory locations F8h to FFh are configured for  
write-protection.  
B1: Writing this bit to a 1 protects the upper block of memory. If  
this bit is set, memory locations 80h to F7h are configured for  
write-protection. The upper page must be unlocked in order to  
modify the locking of this portion of memory.  
B0: Writing this bit to a 1 protects the lower block of memory. If  
this bit is set, memory locations 00h to 7Fh are configured for  
write-protection. The upper page must be unlocked in order to  
modify the locking of this portion of memory.  
4 of 20  
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