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DS1845B-010 PDF预览

DS1845B-010

更新时间: 2024-02-03 20:14:38
品牌 Logo 应用领域
达拉斯 - DALLAS 转换器电位器存储电阻器
页数 文件大小 规格书
13页 102K
描述
Dual NV Potentiometer and Memory

DS1845B-010 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:BGA
包装说明:BGA, BGA16,4X4,40针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:8 weeks
风险等级:1.22其他特性:NONVOLATILE MEMORY; OTHER RESISTOR VALUE IS 10000 OHM; IT CAN ALSO OPERATE FROM A 5V SUPPLY
标称带宽:1 kHz控制接口:2-WIRE SERIAL
转换器类型:DIGITAL POTENTIOMETERJESD-30 代码:S-PBGA-B16
JESD-609代码:e3长度:4 mm
湿度敏感等级:3功能数量:2
位置数:256端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装等效代码:BGA16,4X4,40封装形状:SQUARE
封装形式:GRID ARRAY峰值回流温度(摄氏度):260
电源:3/5 V认证状态:Not Qualified
电阻定律:LINEAR最大电阻容差:20%
最大电阻器端电压:3.5 V最小电阻器端电压:-0.5 V
座面最大高度:1.5 mm子类别:Digital Potentiometers
标称供电电压:3 V表面贴装:YES
标称温度系数:30 ppm/ °C温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:BALL
端子节距:1 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:30标称总电阻:10000 Ω
宽度:4 mmBase Number Matches:1

DS1845B-010 数据手册

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DS1845  
Device Addressing: The DS1845 must receive an 8-bit device address word following a start condition  
to enable a specific device for a read or write operation. The address word is clocked into the DS1845  
MSB to LSB. The address word consists of Ah (1010) followed by A2, A1, and A0 then the R/W  
(READ/WRITE) bit. If the R/W bit is high, a read operation is initiated. The R/W is low, a write  
operation is initiated. For a device to become active, the values of A2, A1 and A0 must be the same as  
the hard-wired address pins on the DS1845. Upon a match of written and hard-wired addresses, the  
DS1845 will output a zero for one clock cycle as an acknowledge. If the address does not match the  
DS1845 returns to a low-power mode.  
Write Operations: After receiving a matching address byte with the R/W bit set low, the device goes  
into the write mode of operation. The master must transmit an 8-bit EEPROM memory address to the  
device to define the address where the data is to be written. After the reception of this byte, the DS1845  
will transmit a zero for one clock cycle to acknowledge the receipt of the address. The master must then  
transmit an 8-bit data word to be written into this address. The DS1845 will again transmit a zero for one  
clock cycle to acknowledge the receipt of the data. At this point the master must terminate the write  
operation with a stop condition. The DS1845 then enters an internally timed write process Tw to the  
EEPROM memory. All inputs are disabled during this byte write cycle.  
The DS1845 is capable of an 8-byte page write. A page write is initiated the same way as a byte write,  
but the master does not send a stop condition after the 1st byte. Instead, after the slave acknowledges  
receipt of the data byte, the master can send up to seven more bytes using the same nine-clock sequence.  
The master must terminate the write cycle with a stop condition or the data clocked into the DS1845 will  
not be latched into permanent memory.  
Acknowledge Polling: Once the internally-timed write has started and the DS1845 inputs are disabled,  
acknowledge polling can be initiated. The process involves transmitting a start condition followed by the  
device address. The R/W bit signifies the type of operation that is desired. The read or write sequence  
will only be allowed to proceed if the internal write cycle has completed and the DS1845 responds with a  
zero.  
Read Operations: After receiving a matching address byte with the R/W bit set high, the device goes  
into the read mode of operation. There are three read operations: current address read, random read and  
sequential address read.  
CURRENT ADDRESS READ  
The DS1845 has an internal address register that maintains the address used during the last read or write  
operation, incremented by one. This data is maintained as long as VCC is valid. If the most recent  
address was the last byte in memory, then the register resets to the first address. This address stays valid  
between operations as long as power is available.  
Once the device address is clocked in and acknowledged by the DS1845 with the R/W bit set to high, the  
current address data word is clocked out. The master does not respond with a zero, but does generate a  
stop condition afterwards.  
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