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DS1812R-10+T&R PDF预览

DS1812R-10+T&R

更新时间: 2024-11-24 14:49:11
品牌 Logo 应用领域
美信 - MAXIM 光电二极管
页数 文件大小 规格书
5页 117K
描述
Power Supply Support Circuit, Fixed, 1 Channel, +4.35VV, CMOS, PDSO3, TO236-AB, SOT-23, 3 PIN

DS1812R-10+T&R 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOT-23
包装说明:TSSOP, TO-236针数:3
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:0.75
可调阈值:NO模拟集成电路 - 其他类型:POWER SUPPLY SUPPORT CIRCUIT
JESD-30 代码:R-PDSO-G3JESD-609代码:e3
长度:2.92 mm湿度敏感等级:1
信道数量:1功能数量:1
端子数量:3最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TO-236
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:1.2/5.5 V
认证状态:Not Qualified座面最大高度:1.12 mm
子类别:Power Management Circuits最大供电电流 (Isup):0.04 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.95 mm端子位置:DUAL
阈值电压标称:+4.35V处于峰值回流温度下的最长时间:30
宽度:1.3 mmBase Number Matches:1

DS1812R-10+T&R 数据手册

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DS1812  
5V EconoReset with Active  
High Push-Pull Output  
www.maxim-ic.com  
FEATURES  
PIN ASSIGNMENT  
C Automatically restarts a microprocessor after  
power failure  
3
DALLAS  
DS1812  
Econo  
C Maintains reset for 150 ms after VCC returns  
to an in-tolerance condition  
Reset  
C Reduces need for discrete components  
C Precision temperature-compensated voltage  
reference and voltage sensor  
1
2
TOP VIEW  
SOT-23 PACKAGE  
See Mech.  
C Low-cost TO-92, or space saving surface  
mount SOT-23 packages available  
C Push-pull active high output  
Drawings Section  
On Website  
1 2 3  
1 2 3  
C Operating temperature -40LC to +85LC  
BOTTOM VIEW  
TO-92 PACKAGE  
See Mech.  
Drawings Section  
On Website  
PIN DESCRIPTION  
TO-92  
1
2
3
RST  
VCC  
Active High Reset Output  
Power Supply  
GND  
Ground  
SOT-23  
1
2
3
RST  
VCC  
Active High Reset Output  
Power Supply  
GND  
Ground  
DESCRIPTION  
The DS1812 EconoReset uses a precision temperature reference and comparator circuit to monitor the  
status of the power supply (VCC). When an out-of-tolerance condition is detected, an internal power-fail  
signal is generated which forces reset to the active state. When VCC returns to an in-tolerance condition,  
the reset signal is kept in the active state for approximately 150 ms to allow the power supply and  
processor to stabilize.  
1 of 5  
041002  

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