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DS1776MW8

更新时间： 2024-11-20 14:49:11
品牌 Logo 应用领域
德州仪器 - TI 信息通信管理逻辑集成电路
页数 文件大小 规格书
11页 224K
描述
IC,BUS TRANSCEIVER,SINGLE,8-BIT,BICMOS,WAFER

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中文翻译

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DS1776MW8 技术参数

生命周期：Obsolete包装说明：, WAFER
Reach Compliance Code：unknown风险等级：5.84
控制类型：COMMON CONTROL计数方向：BIDIRECTIONAL
逻辑集成电路类型：REGISTERED BUS TRANSCEIVER最大I（ol）：0.1 A
位数：8功能数量：1
最高工作温度：125 °C最低工作温度：-55 °C
输出特性：3-STATE输出极性：TRUE
封装等效代码：WAFER电源：5 V
Prop。Delay @ Nom-Sup：17 ns认证状态：Not Qualified
筛选级别：38535Q/M;38534H;883B子类别：Bus Driver/Transceivers
标称供电电压 (Vsup)：5 V技术：BICMOS
温度等级：MILITARYBase Number Matches：1

DS1776MW8 数据手册

 浏览型号DS1776MW8的Datasheet PDF文件第2页浏览型号DS1776MW8的Datasheet PDF文件第3页浏览型号DS1776MW8的Datasheet PDF文件第4页浏览型号DS1776MW8的Datasheet PDF文件第5页浏览型号DS1776MW8的Datasheet PDF文件第6页浏览型号DS1776MW8的Datasheet PDF文件第7页 
January 1996  
DS1776  
PI-Bus Transceiver  
General Description  
The DS1776 is an octal PI-bus Transceiver. The A to B path  
is latched. B outputs are open collector with series Schottky  
diode, ensuring minimum B output loading. B outputs also  
have ramped rise and fall times (2.5 ns typical), ensuring  
minimum PI-bus ringing. B inputs have glitch rejection cir-  
cuitry, 4 ns typical.  
driver is designed to sink 100 mA from 2V and features a  
controlled linear ramp to minimize crosstalk and ringing on  
the bus.  
A separate high level control voltage (VX) is provided to  
prevent the A side output high level from exceeding future  
high density processor supply voltage levels. For 5V sys-  
tems, VX is tied to VCC  
.
Designed using National’s Bi-CMOS process for both low  
operating and disabled power. AC performance is optimized  
for the PI-Bus inter-operability requirements.  
Features  
n Mil-Std-883C qualified  
n Similar to BTL  
The DS1776 is an octal latched transceiver and is intended  
to provide the electrical interface to a high performance  
wired-or bus. This bus has a loaded characteristic imped-  
ance range of 20Ω to 50Ω and is terminated on each end  
with a 30Ω to 40Ω resistor.  
The DS1776 is an octal bidirectional transceiver with open  
collector B and TRI-STATE® A port output drivers. A latch  
function is provided for the A port signals. The B port output  
n Low power ICCL = 41 mA max  
n B output controlled ramp rate  
n B input noise immunity, typically 4 ns  
n Available in 28-pin DIP, Flatpak and CLCC  
n Pin and function compatible with Signetics 54F776  
Pin Configurations  
Pin Configuration  
Pin Configuration  
01087502  
Logic Symbol  
01087501  
Order Number DS1776E/883 or DS1776J/883  
See NS Package E28A or J28B  
01087503  
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
© 2004 National Semiconductor Corporation  
DS010875  
www.national.com  
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