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DS1743P-70 PDF预览

DS1743P-70

更新时间: 2024-11-26 02:53:07
品牌 Logo 应用领域
ARTSCHIP 时钟双倍数据速率外围集成电路
页数 文件大小 规格书
15页 497K
描述
Y2KC Nonvolatile Timekeeping RAM

DS1743P-70 数据手册

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DS1743/DS1743P  
Y2KC Nonvolatile Timekeeping RAM  
FEATURES  
PIN ASSIGNMENT  
z Integrated NV SRAM, real time clock, crystal, power-fail  
control circuit and lithium energy source  
z Clock registers are accessed identical to the static RAM.  
These registers are resident in the eight top RAM locations.  
z Century byte register  
z Totally nonvolatile with over 10 year of operation in the  
absence of power  
z BCD coded century, year, month, date, day, hours, minutes,  
and seconds with automatic leap year compensation valid  
up to the year 2100  
z Battery voltage level indicator flag  
z Power-fail write protection allows for ±10% Vcc power  
supply tolerance  
z Lithium energy source is electrically disconnected to retain  
freshness until power is applied for the first time  
z DIP Module only  
-
Standard JEDEC bytewide 8k x 8 static RAM pinout  
z PowerCap ® Module Board only  
-
Surface mountable package for direct connection to  
PowerCap containing battery and crystal  
Replaceable battery (PowerCap)  
Power-On Reset Output  
Pin for pin compatible with other densities of DS174XP  
Timekeeping RAM  
-
-
-
ORDERING INFORMATION  
PIN DESCRIPTION  
A0-A12  
-Address Input  
-Chip Enable  
CE2  
-Chip Enable 2 (DIP Module only)  
-Output Enable  
-Write Enable  
Vcc  
-Power Supply Input  
-Ground  
GND  
DQ0-DQ7 -Data Input/Output  
NC  
-No Connection  
-Power-On Reset Output  
(PowerCap Module board only)  
-Crystal Connection  
X1,X2  
VBAT  
-Battery Connection  
www.artschip.com  
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