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DS17285S-5 PDF预览

DS17285S-5

更新时间: 2024-09-22 22:23:59
品牌 Logo 应用领域
达拉斯 - DALLAS 时钟
页数 文件大小 规格书
38页 408K
描述
3V/5V Real-Time Clock

DS17285S-5 数据手册

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DS17285/DS17287  
DS17285 ONLY  
X1, X2 – Connections for a standard 32.768kHz quartz crystal. For greatest accuracy, the DS17285 must  
be used with a crystal that has a specified load capacitance of either 6pF or 12.5pF. The crystal select  
(CS) bit in extended-control register 4B is used to select operation with a 6pF or 12.5pF crystal. The  
crystal is attached directly to the X1 and X2 pins. There is no need for external capacitors or resistors.  
Note: X1 and X2 are very high-impedance nodes. It is recommended that they and the crystal be guard-  
ringed with ground and that high frequency signals be kept away from the crystal area.  
For more information about crystal selection and crystal layout considerations, refer to Application Note  
58, “Crystal Considerations with Dallas Real-Time Clocks.” The DS17285 can also be driven by an  
external 32.768kHz oscillator. In this configuration, the X1 pin is connected to the external oscillator  
signal and the X2 pin is floated.  
VBAT Battery input for any standard 3V lithium cell or other energy source. Battery voltage must be  
held between 2.5V and 3.7V for proper operation. UL recognized to ensure against reverse charging  
current when used in conjunction with a lithium battery. See “Conditions of Acceptability” at  
www.maxim-ic.com/TechSupport/AQ/ntrl.htm.  
POWER-DOWN/POWER-UP CONSIDERATIONS  
The RTC function continues to operate and all of the RAM, time, calendar, and alarm memory locations  
remain nonvolatile regardless of the level of the VCC input. When VCC is applied to the  
DS17285/DS17287 and reaches a level of greater than VPF (power-fail trip point), the device becomes  
accessible after tREC, provided that the oscillator is running and the oscillator countdown chain is not in  
reset (Register A). This time period allows the system to stabilize after power is applied.  
The DS17285/DS17287 is available in either a 3V or a 5V device.  
The 5V device is fully accessible and data can be written and read only when VCC is greater than 4.5V.  
When VCC is below 4.5V, read and writes are inhibited. However, the timekeeping function continues  
unaffected by the lower input voltage. As VCC falls below the greater of VBAT and VBAUX, the RAM and  
timekeeper are switched over to a lithium battery connected either to the VBAT pin or VBAUX pin.  
The 3V device is fully accessible and data can be written or read only when VCC is greater than 2.7V.  
When VCC falls below VPF, access to the device is inhibited. If VPF is less than VBAT and VBAUX, the  
power supply is switched from VCC to the backup supply (the greater of VBAT and VBAUX) when VCC drops  
below VPF. If VPF is greater than VBAT and VBAUX, the power supply is switched from VCC to the backup  
supply when VCC drops below the larger of VBAT and VBAUX  
.
When VCC falls below VPF, the chip is write-protected. With the possible exception of the KS , PWR ,  
RCLR , and SQW pins, all inputs are ignored and all outputs are in a high-impedance state.  
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