DS1624S+T&R

更新时间： 2024-02-19 09:35:15

品牌	Logo	应用领域
美信 - MAXIM		存储
页数	文件大小	规格书
20页	667K
描述
Digital Thermometer and Memory

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技术参数
数据手册

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DS1624S+T&R 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	包装说明：	SOP8,.3
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	Factory Lead Time：	6 weeks
风险等级：	1.37	Is Samacsys：	N
其他特性：	COMPLIANCE TO MIL-208	主体宽度：	5.285 mm
主体高度：	1.98 mm	主体长度或直径：	5.31 mm
外壳：	PLASTIC	JESD-609代码：	e3
安装特点：	SURFACE MOUNT	位数：	13
端子数量：	8	最大工作电流：	1 mA
最高工作温度：	125 °C	最低工作温度：	-55 °C
输出接口类型：	2-WIRE INTERFACE	封装主体材料：	PLASTIC/EPOXY
封装等效代码：	SOP8,.3	封装形状/形式：	RECTANGULAR
电源：	3/5 V	传感器/换能器类型：	TEMPERATURE SENSOR,SWITCH/DIGITAL OUTPUT,SERIAL
子类别：	Other Sensors/Transducers	最大供电电压：	5.5 V
最小供电电压：	2.7 V	表面贴装：	YES
端子面层：	Matte Tin (Sn)	端接类型：	SOLDER
Base Number Matches：	1

DS1624S+T&R 数据手册

DS1624

Data valid: The state of the data line represents valid data when, after a START condition, the data line

is stable for the duration of the HIGH period of the clock signal. The data on the line must be changed

during the LOW period of the clock signal. There is one clock pulse per bit of data.

Each data transfer is initiated with a START condition and terminated with a STOP condition The

number of data bytes transferred between START and STOP conditions is not limited, and is determined

by the master device. The information is transferred byte–wise and each receiver acknowledges with a

ninth bit.

Within the bus specifications a regular mode (100 KHz clock rate) and a fast mode (400 KHz clock rate)

are defined. The DS1624 works in both modes.

Acknowledge: Each receiving device, when addressed, is obliged to generate an acknowledge after the

reception of each byte. The master device must generate an extra clock pulse which is associated with this

acknowledge bit.

A device that acknowledges must pull down the SDA line during the acknowledge clock pulse in such a

way that the SDA line is stable LOW during the HIGH period of the acknowledge related clock pulse. Of

course, setup and hold times must be taken into account. A master must signal an end of data to the slave

by not generating an acknowledge bit on the last byte that has been clocked out of the slave. In this case,

the slave must leave the data line HIGH to enable the master to generate the STOP condition.

DATA TRANSFER ON 2-WIRE SERIAL BUS Figure 2

Figure 2 details how data transfer is accomplished on the two–wire bus. Depending upon the state of the

bit, two types of data transfer are possible:

1. Data transfer from a master transmitter to a slave receiver. The first byte transmitted by the

master is the slave address. Next follows a number of data bytes. The slave returns an acknowledge

bit after each received byte.

2. Data transfer from a slave transmitter to a master receiver. The first byte (the slave

address) is transmitted by the master. The slave then returns an acknowledge bit. Next follows a

number of data bytes transmitted by the slave to the master. The master returns an acknowledge bit

4 of 20

1 2 345 6 7...20

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与DS1624S+T&R相关器件

型号	品牌	描述	获取价格	数据表
DS1625S	MAXIM	Temperature Sensor, Rectangular, 8 Pin, Surface Mount,	获取价格
DS1626	DALLAS	High-Precision 3-Wire Digital Thermometer and Thermostat	获取价格
DS1626	ADI	高精度、3线数字温度计及温度监控器	获取价格
DS1626_07	DALLAS	High-Precision 3-Wire Digital Thermometer and Thermostat	获取价格
DS1626S	MAXIM	Serial Switch/Digital Sensor, 12 Bit(s), 0.50Cel, Rectangular, Surface Mount, SOIC-8	获取价格
DS1626S+	MAXIM	Serial Switch/Digital Sensor, 12 Bit(s), 0.50Cel, Rectangular, Surface Mount, LEAD FREE, S	获取价格

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