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DS1267E-050/TR PDF预览

DS1267E-050/TR

更新时间: 2024-01-24 19:30:51
品牌 Logo 应用领域
达拉斯 - DALLAS 电位器
页数 文件大小 规格书
12页 314K
描述
Dual Digital Potentiometer Chip

DS1267E-050/TR 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active零件包装代码:SOIC
包装说明:TSSOP,针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.77
控制接口:3-WIRE SERIAL转换器类型:DIGITAL POTENTIOMETER
JESD-30 代码:R-PDSO-G20JESD-609代码:e0
长度:6.5 mm湿度敏感等级:1
功能数量:2位置数:256
端子数量:20最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):240
认证状态:Not Qualified电阻定律:LINEAR
座面最大高度:1.1 mm标称供电电压:5 V
表面贴装:YES温度等级:COMMERCIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED标称总电阻:50000 Ω
宽度:4.4 mmBase Number Matches:1

DS1267E-050/TR 数据手册

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DS1267  
STACKED CONFIGURATION  
The potentiometers of the DS1267 can be connected in series as shown in Figure 3. This is referred to as  
the stacked configuration. The stacked configuration allows the user to double the total end-to-end  
resistance of the part and the number of steps to 512 (or 9 bits of resolution).  
The wiper output for the combined stacked potentiometer will be taken at the SOUT pin, which is the  
multiplexed output of the wiper of potentiometer-0 (W0) or potentiometer-1 (W1). The potentiometer  
wiper selected at the SOUT output is governed by the setting of the stack select bit (bit 0) of the 17-bit I/O  
shift register. If the stack select bit has value 0, the multiplexed output, SOUT, will be that of the  
potentiometer-0 wiper. If the stack select bit has value 1, the multiplexed output, SOUT, will be that of the  
potentiometer-1 wiper.  
STACKED CONFIGURATION Figure 3  
CASCADE OPERATION  
A feature of the DS1267 is the ability to control multiple devices from a single processor. Multiple  
DS1267s can be linked or daisy-chained as shown in Figure 4. As a data bit is entered into the I/O shift  
register of the DS1267 a bit will appear at the COUT output within a maximum delay of 50 nanoseconds.  
The stack select bit of the DS1267 will always be the first out the part at the beginning of a transaction.  
Additionally the COUT pin is always active regardless of the state of RST . This allows one to read the I/O  
shift register without changing its value.  
CASCADING MULTIPLE DEVICES Figure 4  
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