Datasheet > DS1005S-60/T&R

DS1005S-60/T&R

更新时间： 2024-11-26 06:02:15

品牌	Logo	应用领域
达拉斯 - DALLAS		光电二极管输出元件逻辑集成电路延迟线
页数	文件大小	规格书
6页	62K
描述
Silicon Delay Line, 1-Func, 5-Tap, True Output, CMOS, PDSO16, 0.300 INCH, SOIC-16

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DS1005S-60/T&R 数据手册

DS1005

5-Tap Silicon Delay Line

www.dalsemi.com

FEATURES

PIN ASSIGNMENT

ꢀ All-silicon time delay

V_CC

ꢀ 5 taps equally spaced

ꢀ Delay tolerance ±2 ns or ±3%, whichever is

greater

ꢀ Stable and precise over temperature and

voltage range

ꢀ Leading and trailing edge accuracy

ꢀ Economical

ꢀ Auto-insertable, low profile

ꢀ Standard 14-pin DIP, 8-pin DIP, or 16-pin

SOIC

TAP 2

TAP 1

TAP 2

TAP 1

TAP 3

TAP 4

GND

TAP 4

TAP 5

GND

TAP 5

DS1005 14-Pin DIP (300-mil)

See Mech. Drawings Section

DS1005S 16-Pin SOIC

(300-mil)

See Mech. Drawings Section

ꢀ Tape and reel available for surface-mount

ꢀ Low-power CMOS

ꢀ TTL/CMOS compatible

ꢀ Vapor phase, IR and wave solderability

ꢀ Custom delays available

ꢀ Quick turn prototypes

V_CC

TAP 1

TAP 3

TAP 5

TAP 2

TAP 4

GND

ꢀ Extended temperature range available

DS1005M 8-Pin DIP (300-mil)

See Mech. Drawings Section

PIN DESCRIPTION

TAP 1-TAP 5 - TAP Output Number

V_CC

GND

- +5 Volts

- Ground

- No Connection

- Input

DESCRIPTION

The DS1005 5-Tap Silicon Delay Line provides five equally spaced taps with delays ranging from 12 ns

to 250 ns, with an accuracy of ±2 ns or ±3%, whichever is greater. This device is offered in a standard 14-

pin DIP, making it compatible with existing delay line products. Space-saving 8-pin DIPs and 16-pin

SOICs are also available. Both enhanced performance and superior reliability over hybrid technology is

achieved by the combination of a 100% silicon delay line and industry standard DIP and SOIC

packaging. In order to maintain complete pin compatibility, DIP packages are available with hybrid lead

configurations. The DS1005 reproduces the input logic level at each tap after the fixed delay specified by

the dash number in Table 1. The device is designed with both leading and trailing edge accuracy. Each

tap is capable of driving up to ten 74LS loads. Dallas Semiconductor can customize standard products to

meet special needs. For special requests and rapid delivery, call (972) 371–4348.

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111799

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与DS1005S-60/T&R相关器件

型号	品牌	获取价格	描述	数据表
DS1005S-60+T&R	DALLAS	获取价格	Silicon Delay Line, 1-Func, 5-Tap, True Output, CMOS, PDSO16, 0.300 INCH, SOIC-16
DS1005S-75	DALLAS	获取价格	5-Tap Silicon Delay Line
DS1005S-75/T&R	DALLAS	获取价格	Silicon Delay Line, 1-Func, 5-Tap, True Output, CMOS, PDSO16, 0.300 INCH, SOIC-16
DS1006	LATTICE	获取价格	LatticeECP2/M Family Data Sheet (Japanese Language Version)
DS1007	DALLAS	获取价格	7-1 Silicon Delay Line
DS1007(DIE)-11	DALLAS	获取价格	Silicon Delay Line, 7-Func, 1-Tap, True Output, CMOS, DIE
DS1007(DIE)-13	DALLAS	获取价格	Silicon Delay Line, 7-Func, 1-Tap, True Output, CMOS, DIE
DS1007(DIE)-3	DALLAS	获取价格	Silicon Delay Line, 7-Func, 1-Tap, True Output, CMOS, DIE
DS1007(DIE)-4	DALLAS	获取价格	Silicon Delay Line, 7-Func, 1-Tap, True Output, CMOS, DIE
DS1007(DIE)-6	DALLAS	获取价格	Silicon Delay Line, 7-Func, 1-Tap, True Output, CMOS, DIE

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