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DP83848H_07 PDF预览

DP83848H_07

更新时间: 2024-11-24 04:11:15
品牌 Logo 应用领域
美国国家半导体 - NSC 以太网局域网(LAN)标准
页数 文件大小 规格书
78页 1016K
描述
DP83848H PHYTER㈢ Mini - Extreme Single 10/100 Ethernet

DP83848H_07 数据手册

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October 2007  
DP83848H PHYTER® Mini - Extreme Single 10/100 Ethernet  
Transceiver  
Features  
General Description  
Low-power 3.3V, 0.18µm CMOS technology  
Auto-MDIX for 10/100 Mb/s  
The DP83848H PHYTER® Mini Extreme addresses the  
high quality, high reliability and small form factor required  
for rugged operation in space sensitive and thermally  
demanding environments. This device is ideally suited for  
industrial and motor control, building/factory automation,  
automotive and test equipment applications.  
Energy Detection Mode  
3.3V MAC Interface  
RMII Rev. 1.2 Interface (configurable)  
MII Interface and MII serial management interface (MDC  
and MDIO)  
The DP83848H is designed from ground up for extreme  
temperature performance, with a thermally efficient pack-  
age ensuring reliable operation over an operating range of  
-40C to 125C. Rigorously tested at both low temperature  
and high temperature extremes, the device is ideal for out-  
door environments and demanding factory floor conditions.  
IEEE 802.3u Auto-Negotiation and Parallel Detection  
IEEE 802.3u ENDEC, 10BASE-T transceivers and filters  
IEEE 802.3u PCS, 100BASE-TX transceivers and filters  
Integrated ANSI X3.263 compliant TP-PMD physical sub-  
layer with adaptive equalization and Baseline Wander  
compensation  
The device offers performance beyond the IEEE specifica-  
tions, with superior interoperability and industry leading  
performance. The DP83848H offers Auto-MDIX to remove  
cabling complications, superior ESD protection of greater  
than 4KV HBM for greater reliability, and superior cable  
length operation (greater than 137m) to provide a high  
level of performance in all applications.  
Error-free Operation up to 137 meters  
ESD protection - 4KV Human body model  
Configurable LED for link and activity  
Supports system clock from oscillator  
A number of system cost-reducing features have been  
integrated that are not commonly found in other Ethernet  
Physical layer products (PHYs). For example, the  
DP83848H offers a 25MHz clock out that eliminates the  
need and hence the space and cost, of an additional  
Media Access Control (MAC) clock source component. In  
addition, both MII and RMII are supported ensuring ease  
and flexibility of design.  
Single register access for complete PHY status  
10/100 Mb/s packet BIST (Built in Self Test)  
40 pin LLP package (6mm) x (6mm) x (0.8mm)  
Applications  
Peripheral devices  
Mobile devices  
DP83848H is offered in a small 6mm x 6mm LLP 40-pin  
package.  
Factory and building automation  
Basestations  
System Diagram  
DP83848H  
10BASE-T  
or  
10/100 Ethernet  
Transceiver  
MII/RMII  
100BASE-TX  
MPU/CPU  
Clock  
Status  
LED  
Source  
Typical Ethernet Application  
PHYTER® is a registered trademark of National Semiconductor Corporation.  
www.national.com  
© 2007 National Semiconductor Corporation  

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